tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 211

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

Preliminary Data Sheet
May 2001
11 M13/M23 MUX/DeMUX Registers
Table 244. M13_DS2_LB_DET_R, DS2 Loopback Detect Status (RO)
Table 245. M13_DS2_RSV_RCV_R, DS2 Receive Reserved Bit Delta Status (RO)
Table 246. M13_DS2DMX_LOC_R, DS2 DeMUX Loss of Clock Status (RO)
Table 247. M13_DS1_LOC_R[1—4], DS1 Loss of Clock Status Registers (RO)
Agere Systems Inc.
0x1003C
0x1003D
0x1003C
0x1003D
Address
Address
Address
Address
0x1003E
0x1003E
0x10035 15:7
0x10036 15:7
0x10037 15:7
0x1003F
0x1003F
15:4
15:8
15:8
15:8
6:0
6:0
6:0
3:0
7:0
7:0
7:0
Bit
Bit
Bit
Bit
M13_DS1_LOC[28:25]
M13_DS1_LOC[24:17]
M13_DS2_RSV_
M13_DS1_LOC[16:9]
M13_DS2DMX_
M13_DS1_LOC[8:1]
M13_DS2_LB_
RCV[7:1]
LOC[7:1]
DET[7:1]
Name
Name
Name
—
—
—
Name
—
—
—
—
Reserved.
In the M23 mode (M13_M23_CBP = 1
in each received DS3 M-subframe are checked for loopback
requests. If the third C bit differs from the first and second C
bits in the yth M-subframe for 5 successive DS3 frames,
M13_DS2_LB_DETy is set to 1. M13_DS2_LB_DETy is
cleared when the third C bit does not differ from the first two C
bits in subframe y for 5 successive DS3 frames. In the C-bit
parity mode, M13_DS2_LB_DETy is fixed at 0.
Reserved.
The M13_DS2_RSV_RCVy bit changes state only after the
reserved bit in the E1 mode (M13_DS1_E1Ny = 0) is received
as the same value for 4 consecutive DS2 frames. DS2 frame
periods are not counted while M13_DS3_OOF = 1. It is set
equal to the reserved bit.
Reserved.
A logic 1 of M13_DS2DMX_LOCy bit indicates that loss of
clock is detected on the DS2 clock input, XC_DS2DMXCLKy.
Reserved.
Reserved.
Reserved.
Reserved.
The M13_DS1_LOCx bits indicate when loss of clock is
detected on a low-speed clock input, XC_DS1CLKx.
(continued)
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Function
Function
Function
Function
TMXF28155/51 Super Mapper
(Table
260)), the C bits
Default
Default
Default
Default
Reset
0x000
Reset
0x000
Reset
0x000
Reset
0x000
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x0
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