tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 485

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tmxf28155

Manufacturer Part Number
tmxf28155
Description
Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
Manufacturer
ETC-unknow
Datasheet

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Preliminary Data Sheet
TMXF28155/51 Super Mapper
May 2001
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
21 28-Channel Framer Block Functional Description
(continued)
21.3 Framer-to-Line Interface Unit Physical Interface
The framer-LIU interface of the Super Mapper framer consists of 28 groups of six connections. The internal DS1
cross connect must be configured to connect the framer-LIU interface through the multifunction system interface to
external T1/E1 line interface devices. The six connections for each framer are TND, TPD, and TLCK driven from the
transmit framer (receive path) and RPD, RND, and RCLK (transmit path) sourced from the external line interface
device. The connections can optionally be from/to the protected switch. See
Table 3 on page 15
for the external pin
names that correspond to the desired six connections.
The line interface may operate in single-rail or dual-rail mode. The default mode of the line encoder is single-rail
(FRM_LD_MODE[2:0] = 000
(Table
430), FRM_LE_MODE[2:0] = 000
(Table
431)). In this mode, the input signals
are passed transparently through the line encoder.
In single rail mode, the link’s framer internal bipolar line encoder/decoder is disabled and monitoring of received
line format violation is accomplished with the use of the RND input. When RND = 1 on the rising edge of RLCK, the
line format violation FRM_BPV[15:0]
(Table
388) counter increments by one. The link’s transmit framer transmits
data via the TPD output pin while TND is forced to a 0 state.
In dual rail mode, the internal line encoder/decoder and monitoring are enabled. The line code may be selected by
provisioning FRM_LD_MODE[2:0] and FRM_LE_MODE[2:0]:
1. Alternate Mark Inversion (AMI).
2. High-Density Bipolar of Order 3—G.703, A.1 (HDB3).
3. Binary 8 Zero Code Suppression—G.703, A.2 (B8ZS).
Line format violations due to excessive zeros will be optionally monitored as follows:
1. B8ZS—8 consecutive zeros cause a violation.
2. HDB3—4 consecutive zeros cause a violation.
21.3.1 Line Interface References/Standards
1. ITU-T Recommendation G.703, Physical/Electrical Characteristics of Hierarchical Digital Interfaces;1991.
2. ANSI T1.403-1995, Network-to-Customer Installation - DS1 Metallic Interface; March 21, 1995.
21.3.2 Frame Formats
The 28 superframers support the following frame formats:
1. DS1 superframe D4.
2. DS1 superframe J-D4 with Japanese remote alarm.
3. DS1 superframe DDS.
4. DS1 superframe SLC -96.
5. DS1 extended superframe (ESF).
6. Japanese extended superframe J-ESF (J1 standard with different CRC-6 algorithm).
7. Nonalign DS1 (transparent 193 bits).
8. CEPT basic frame {ITU G.706}.
9. CEPT CRC-4 multiframe with 100 ms timer {ITU G.706}.
10. CEPT CRC-4 multiframe with 400 ms timer (automatic CRC-4/nonCRC-4 equipment interworking) {ITU G.706
Annex B}.
11. Nonalign E1 (transparent 256 bits).
12. 2.048 coded mark inversion (CMI) coded interface (TTC Standards JJ-20.11).
13. 6.312 Mbits/s interface (ITU G.704/NTT J2).
Agere Systems Inc.
485

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