tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 490

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
21 28-Channel Framer Block Functional Description
The following system bus modes are supported (no special provisioning is needed for the signaling processor to
distinguish between these system bus modes):
The VT mapper interface in the signaling processor supports VT1.5, VT 2 byte sync mapping, as well as VC-11
byte sync mapping using handling groups.
The host can read the signaling data extracted from the line, system, or VT mapper interface at any time. The
transmit signaling processor can be configured so that the host provides the signaling data to be forwarded to the
line, system, or VT mapper interface.
Other signaling features include:
21.8.2 Signaling References/Standards
21.9 Receive Signaling Per-Link Feature Provisioning
The receive signaling processor requires the provisioning of four items for each link in order to enable signaling
extraction and delivery:
1. Signaling state mode source (host or Rx CHI interface).
2. Signaling state mode (2-, 4-, and 16-state mode or no-signaling).
3. Signaling source (receive line, VT mapper, or host interface).
4. Signaling destination (transmit system or transmit line interface).
490
Parallel system bus
CHI bus in ASM mode
Debounce on all signaling data extracted from the line interface or the VT mapper interface.
Host interrupt upon change of signaling state in the receive path.
Signaling extraction inhibit based on frame alignment and framing bit errors.
Stomping of DS1 robbed-bit signaling positions.
Support of zero-code suppression on the line interface in the transmit path.
Superframe signaling integrity. No signaling data transmitted will be a mix of old and new due to a mid super-
frame update of signaling information.
ITU Rec. G.704 10/98 CEPT Multiframe Signaling Structure
ITU Rec. G.775 10/98 CEPT TS16 AIS Detection, Remote Alarm Detection
ITU Rec. G.732 1998 CEPT Time-Slot 16 mfa, Time-Slot 16 rfa
ITU Rec. O.162 10/92 CEPT Time-Slot 16 rfa Detection
T1.403 1995 Robbed-Bit Signaling
TTC JJ-20.11 CMI Coded Interface
ANSI T1.105 SONET Payload Mapping
Telcordia GF-253-CORE SONET Transport Systems
ITU Rec G.707 10/98 Network Node Interface for SDH
TTC JT G.704 Japanese Synchronous Frame Structures
(continued)
Agere Systems Inc.
May 2001