tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 359

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tmxf28155

Manufacturer Part Number
tmxf28155
Description
Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
Manufacturer
ETC-unknow
Datasheet

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Company
Part Number
Manufacturer
Quantity
Price
Part Number:
tmxf281553BAL3C
Manufacturer:
DSP
Quantity:
5
Preliminary Data Sheet
May 2001
17 TMUX Functional Description
Contents
17 TMUX Functional Description ......................................................................................................................... 359
Agere Systems Inc.
17.1 TMUX Introduction .................................................................................................................................. 361
17.2 TMUX Features ...................................................................................................................................... 361
17.3 TMUX Receive Path Overview ............................................................................................................... 362
17.4 TMUX Transmit Path Overview .............................................................................................................. 364
17.5 Receive Direction (Receive Path from Sonet Global/SDH) .................................................................... 368
17.6 Transmit Direction (Transmit Path to SONET/SDH Line) ....................................................................... 386
17.3.1 Receive Line Framer and Transport Overhead Termination ....................................................... 362
17.3.2 Receive Transport Overhead Monitor and RTOAC Drop ............................................................ 362
17.3.3 Receive MSP 1 + 1 Payload Switch ............................................................................................. 363
17.3.4 Receive Pointer Interpreter .......................................................................................................... 363
17.3.5 Receive High-Order Path Overhead Termination and RPOAC Drop .......................................... 363
17.3.6 Receive Byte Interleave Demultiplexer ........................................................................................ 363
17.3.7 Receive Telecom Bus .................................................................................................................. 363
17.4.1 Transmit Telecom Bus ................................................................................................................. 364
17.5.1 Input Clock and Loss-of-Signal Monitoring .................................................................................. 369
17.5.2 High-Speed Loopback Select Logic ............................................................................................. 369
17.5.3 Frame Alignment—STS-3/STM-1 (AU-4) Framing or STS-1 Framing ......................................... 369
17.5.4 B1 BIP-8 Check ........................................................................................................................... 369
17.5.5 J0 Monitor .................................................................................................................................... 370
17.5.6 Descrambler ................................................................................................................................. 370
17.5.7 F1 Monitor .................................................................................................................................... 371
17.5.8 B2 BIP-8 Check ........................................................................................................................... 371
17.5.9 Automatic Protection Switch (APS) Monitor ................................................................................. 371
17.5.10 K2 Monitor, AIS-L and RDI-L Detect .......................................................................................... 371
17.5.11 M1 REI-L Detect ........................................................................................................................ 372
17.5.12 Sync Status Monitor ................................................................................................................... 372
17.5.13 Receive Transport Overhead Access Channel (RTOAC) .......................................................... 372
17.5.14 MSP 1 + 1 Payload Switch ......................................................................................................... 374
17.5.15 Pointer Interpreter ...................................................................................................................... 374
17.5.16 Path Monitoring Functions ......................................................................................................... 377
17.6.1 Transmit Side Telecom Bus Interface .......................................................................................... 386
17.6.2 Transmit Path and Transport Overhead Insertion Diagram ......................................................... 386
17.6.3 POAC Insert ................................................................................................................................. 388
17.6.4 AIS Path Generation .................................................................................................................... 389
17.6.5 J1 Insert Control ........................................................................................................................... 389
17.6.6 B3 BIP-8 Calculation and Insert ................................................................................................... 389
17.6.7 C2 Signal Label Byte Insert ......................................................................................................... 389
17.6.8 Path RDI (RDI-P) Insert ............................................................................................................... 390
17.6.9 REI-P: G1(7:4) Insert ................................................................................................................... 390
17.6.10 F2 Byte Insert ............................................................................................................................. 391
17.6.11 H4 Insert Control ........................................................................................................................ 391
17.6.12 F3 Byte Insert ............................................................................................................................. 391
17.6.13 K3 Byte Insert ............................................................................................................................ 391
17.6.14 N1 Byte Insert ............................................................................................................................ 391
17.6.15 MSP 1 + 1 Payload Switch ......................................................................................................... 391
17.6.16 Transmit Transport Overhead Access Channel (TTOAC) ......................................................... 391
17.6.17 Sync Status Byte (S1) Insert ...................................................................................................... 393
17.6.18 REI-L: M1 Insert ......................................................................................................................... 393
Table of Contents
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
TMXF28155/51 Super Mapper
Page
359

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