tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 37

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

Preliminary Data Sheet
May 2001
5 Timing Characteristics
Contents
5 Timing Characteristics ........................................................................................................................................ 37
6 Ordering Information............................................................................................................................................ 61
Figures
Figure 6. Generic Clock Timing .............................................................................................................................. 39
Figure 7. Generic Interface Data Timing ................................................................................................................ 41
Figure 8. VT Mapper Transmit Path Overhead Detailed Timing ............................................................................ 45
Figure 9. VT Mapper Receive Path Overhead Detailed Timing ............................................................................. 45
Figure 10. CHI Transmit I/O Timing........................................................................................................................ 46
Figure 11. CHI Receive I/O Timing......................................................................................................................... 47
Figure 12. Parallel System Bus Interface Transmit I/O Timing............................................................................... 48
Figure 13. Parallel System Bus Interface Receive I/O Timing................................................................................ 48
Figure 14. Microprocessor Interface Synchronous Write Cycle (MPMODE (Pin AD17) = 1) ................................. 54
Figure 15. Microprocessor Interface Synchronous Read Cycle (MPMODE (Pin AD17) = 1) ................................. 55
Figure 16. Microprocessor Interface Asynchronous Write Cycle Description (MPMODE (Pin AC18) = 0) ............ 57
Figure 17. Microprocessor Interface Asynchronous Read Cycle (MPMODE (Pin AC18) = 0) ............................... 59
Tables
Table 24. High-speed Input Clock Specifications .................................................................................................. 39
Table 25. Output Clock Specifications ................................................................................................................... 40
Table 26. Input Timing Specifications .................................................................................................................... 41
Table 27. Output Timing Specifications ................................................................................................................. 42
Table 28. DS3 Input Clock Specifications ............................................................................................................. 43
Table 29. Input Timing Specifications .................................................................................................................... 43
Table 30. Output Timing Specifications ................................................................................................................. 43
Table 31. M13 Clock Specifications ...................................................................................................................... 44
Table 32. Input Timing Specifications .................................................................................................................... 44
Table 33. Output Timing Specifications ................................................................................................................. 44
Table 34. VT Mapper Receive Path Overhead Detailed Timing ............................................................................ 45
Table 35. CHI Transmit Timing Characteristics ..................................................................................................... 46
Table 36. CHI Receive Timing Characteristics ...................................................................................................... 47
Table 37. PSB Interface Transmit Timing Characteristics ..................................................................................... 47
Agere Systems Inc.
5.1 TMUX Block Timing ..................................................................................................................................... 39
5.2 DS3 Timing .................................................................................................................................................. 43
5.3 M13 Timing .................................................................................................................................................. 44
5.4 VT Mapper Timing ....................................................................................................................................... 45
5.5 Concentration Highway (CHI) Timing .......................................................................................................... 46
5.6 Parallel System Bus Timing ......................................................................................................................... 47
5.7 NSMI Timing Mode 1 ................................................................................................................................... 49
5.8 SMI Timing Mode 2 (8 pin) ........................................................................................................................... 49
5.9 Framer Only Mode Timing ........................................................................................................................... 51
5.10 Framer—LIU Mode Timing ........................................................................................................................ 53
5.11 Microprocessor Interface Timing ................................................................................................................ 54
5.12 Asynchronous Mode .................................................................................................................................. 56
5.13 General Purpose Interface Timing ............................................................................................................. 60
5.4.1 VT Mapper Lower-Order Path Overhead Interface Timing ................................................................. 45
5.11.1 Synchronous Mode .......................................................................................................................... 54
Table of Contents
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
TMXF28155/51 Super Mapper
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