tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 427

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

Preliminary Data Sheet
May 2001
19 VT/TU Mapper Functional Description
19.1 VT/TU Mapper Introduction
This section describes the requirements of the SONET/SDH virtual tributary payload mapping block. This block
supports the following mappings:
Additionally, this block has two auxiliary channels: one for DS1/E1 signaling insertion and drop, and another for
low-order path overhead (LOPOH) insertion and drop. Control inputs and outputs for each internal block are speci-
fied, along with appropriate control register bit definitions.
19.2 VT/TU Mapper Features
Agere Systems Inc.
28 asynchronous, byte synchronous, or bit synchronous DS1 signals into seven virtual tributary groups (VTGs).
28 asynchronous, byte synchronous, or bit synchronous DS1 signals into seven tributary unit groups (TUG-2s).
28 asynchronous, byte synchronous, or bit synchronous J1 signals into seven virtual tributary groups (VTGs).
28 asynchronous, byte synchronous, or bit synchronous J1 signals into seven tributary unit groups (TUG-2s).
21 asynchronous, byte synchronous, or bit synchronous E1 signals into seven tributary unit groups (TUG-2s).
Any valid DS1/E1 combination resulting in mixed VTGs and TUG-2s.
Maps T1/E1/J1 into VT/TU structures:
Supports asynchronous, byte synchronous, and bit synchronous mappings.
Supports automatic generation or microprocessor overwrite of one bit RDI and one bit RFI.
Supports automatic generation or microprocessor overwrite of enhanced RDI.
Supports ADM applications via tributary loopback and tributary pointer processing.
Supports unidirectional path switch ring (UPSR) applications via low-order path overhead access channel.
Supports five J2 trace identifier modes.
Programmable BIP-2 error insertion.
Monitors BIP-2 bit error rate.
Programmable clear-on-read/clear-on-write registers.
Supports automatic AIS generation for downstream devices.
VC-BIP-2, VC-REI one second error counters.
Programmable saturation or rollover of internal counters.
Complies with GR-253-CORE, G.707, T1.105, G.704, G.783, JT-G707, GR-499, ETS 300 417-1-1.
— E1 into VT2/TU-12.
— T1 into VT1.5/TU-11/TU-12.
— J1 into VT1.5/TU-11/TU-12.
(continued)
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
TMXF28155/51 Super Mapper
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