tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 258

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
12 28-Channel Framer Registers
Table 347. FRM_SYSGR1, System Interface Global Register 1 (R/W) (continued)
Table 348. FRM_SYSGR2, System Interface Global Register 2 (R/W)
258
Address Bit
0x80050
Address
0x80051
2:0
13:0
Bit
7
6
5
4
3
15
14
FRM_DNOTFAS CEPT Dual Not FAS. This bit is applicable in all system modes.
FRM_AISCRCT System AIS on CEPT Timer Expiration.
FRM_TFSCKE
FRM_RSTDONE
FRM_AISLFA
FRM_FSPOL
FRM_HWYENA Transmit System Interface Highway Enable.
(Read Only)
Name
Name
—
—
System AIS on Loss of Frame Alignment.
0 = No action.
1 = System AIS is transmitted when the receive framer or the mapper
0 = No action.
1 = System AIS is transmitted when the receive framer loss of multiframe
0 = FAS and NOTFAS time slots are transmitted to the system. The
1 = NOTFAS is transmitted twice to the system (in the NOTFAS and FAS
System Interface Transmit Frame Sync Clock Edge Select.
0 = Transmit frame sync is sampled on the falling edge of transmit clock.
1 = Transmit frame sync is sampled on the rising edge of transmit clock.
In PSB mode, this bit also determines the clock edge used to drive
data. The sampling point of transmit frame sync defines the zero off-
set for CHI mode.
Frame Sync Polarity.
0 = Transmit and receive frame sync is active low.
1 = Transmit and receive frame sync is active-high.
Reserved. Must write to 0.
0 = Transmit data is forced into a high-impedance state for all
1 = Transmit and receive data is enabled.
Framer Reset Status.
0 = Indicates internal reset is still in process.
1 = Indicates internal reset is complete.
Generally, the FRM_HWYENA bit should not be set to1 until this bit
reads 1.
Reserved. Must write to 0.
loss of frame alignment (MFA for DS1, BFA for CEPT) is detected.
alignment timer expiration is detected. (CEPT only.)
receive system interface expects both FAS and NOTFAS time slots.
time slots). The receive system expects time slots 0 to carry
NOTFAS that is repeated twice.
transmitted time slots. Receive system ignores receive data and
inserts the idle code in all time slots transmitted to the line. This
allows the framer to be fully configured before transmission.
(continued)
Function
Function
Agere Systems Inc.
May 2001
Default
Default
Reset
Reset
0
0
0
0
0
0
0
0
0