tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 261

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

Preliminary Data Sheet
May 2001
12 28-Channel Framer Registers
Table 356. FRM_SYSGR10—FRM_SYSGR14, System Interface Global Register 10—14 (R/W)
Table 357. FRM_SYSGR15, System Interface Global Register 15 (COR)
Table 358. FRM_SYSGR16, System Interface Global Register 16 (R/W)
Agere Systems Inc.
Address
Address
Address
0x80156
0x80157
0x80151
0x80155
—
13:1
13:1
15:0
Bit
Bit
Bit
15
14
15
14
0
0
FRM_PSB_FS_IM Receive PSB frame Sync Interrupt Mask. A 1 prevents the
FRM_PSB_FS_IS
FRM_DPAR_IM
FRM_SPAR_IM
FRM_DPAR_IS
FRM_SPAR_IS
Name
Name
Name
—
—
—
Reserved. Must write to 0.
Data Parity Interrupt. In PSB mode, a 1 indicates a data parity
error was detected. This bit is cleared on read unless the con-
dition that set it still exists after the read.
Signaling Parity Interrupt. In PSB mode, a 1 indicates a sig-
naling parity error was detected. In CHI ASM mode, a 1 indi-
cates a parity error was detected.
This bit is cleared on read unless the condition that set it still
exists after the read.
Reserved. Must write to 0.
Receive PSB frame Sync Interrupt. A 1 indicates a frame
sync error was detected in PSB mode. The frame sync was
either detected when it should not have been (misplaced) or
was not detected when it should have (missing). This bit is
cleared on read unless the condition that set it still exists after
the read.
Data Parity Interrupt Mask. A 1 prevents the FRM_DPAR_IS
status from causing an interrupt. A 0 allows the interrupt.
Signaling Parity Interrupt Mask. A 1 prevents the
FRM_SPAR_IS status from causing an interrupt. A 0 allows the
interrupt.
Reserved. Must write to 0.
FRM_PSB_FS_IS status from causing an interrupt. A 0 allows
the interrupt.
(continued)
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Function
Function
Function
TMXF28155/51 Super Mapper
Default
Default
Default
0x0000
Reset
Reset
Reset
0
0
0
0
1
1
0
1
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