tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 102

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tmxf28155

Manufacturer Part Number
tmxf28155
Description
Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
Manufacturer
ETC-unknow
Datasheet

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155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
8 TMUX Registers
Table 104. TMUX_RPOHMON[1—3][A—D], Receive Monitor Values (RO) (continued)
Table 105. TMUX_TLS_CTL, Transmit Low-speed Control Parameters (R/W)
102
Address
Address
0x40031
0x40032
0x40033
15:8
15:8
15:7
Bit
7:0
7:0
Bit
6:4
3:1
0
TMUX_TLS_PAISINS[3:1] Transmit Low-speed Path AIS Insert Control. Control
TMUX_TLS_UNEQP[3:1] Transmit Low-speed Unequipped Insert Control.
TMUX_F3MON03[7:0] Receive F3 Current Monitor Value for Port 3. See Path
TMUX_F3MON13[7:0] Receive F3 Previous Monitor Value for Port 3. See
TMUX_N1MON3[7:0]
TMUX_K3MON3[7:0]
TMUX_TLSVOEPAR
(continued)
Name
Name
Path User Byte F3 Monitor on
User Byte F3 Monitor on
Receive N1 Monitor Value for Port 3. See N1 Byte Mon-
itor on
Receive K3 Monitor Value for Port 3. See K3 Byte Mon-
itor on
Reserved.
Control bit, when set to a logic 1, causes an unequip
signal to be generated in the selected STS-1/AU-3 time
slot in the STS-3/STM-1 (AU-4) output signal; normal
data is sent when set to a logic 0. Only
TMUX_TLS_UNEQP1 is used in AU-4 mode.
bit, when set to a logic 1, causes path AIS to be
inserted into the selected STS-1/TUG-3 time slot in the
STS-3/STM-1 (AU-4) output signal; normal data is sent
when set to a logic 0. Only TMUX_TLS_PAISINS1 is
used in AU-4 mode.
Transmit Low-speed Verify Odd or Even Parity. Con-
trol bit, when set to a logic 0, causes odd parity to be
verified per byte transfer per STS-1/AU-3 input; other-
wise, even parity is verified.
page
page
381.
381.
Function
page
Function
page
380.
380.
Agere Systems Inc.
May 2001
Default
Default
Reset
Reset
0x000
0x00
0x00
0x00
0x00
0
0
0

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