tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 120

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
8 TMUX Registers
Table 127. TMUX_M1ECNT_17_16 and TMUX_M1ECNT_15_0, Receive M1 Error Counts (RO)
Table 128. TMUX_G1ECNT[1—3], Receive G1 Error Counts (RO)
120
0x4006C—
Address
0x4006E
0x4006F 15:0 TMUX_G1ECNT2[15:0] Receive Path REI Count for Port 2. Counts the number of
0x40070 15:0 TMUX_G1ECNT3[15:0] Receive Path REI Count for Port 3. Counts the number of
Address
0x4006C
0x4006D
15:0 TMUX_G1ECNT1[15:0] Receive Path REI Count for Port 1. Counts the number of
Bit
15:2
15:0
Bit
1:0
TMUX_M1ECNT[17:16]—
TMUX_M1ECNT[15:0]
(continued)
Name
Name
—
B3 errors received in the G1[7:4] bits of port 1 in the
received STS-3/STM-1 (AU-4) frame. This counter can
either count actual errors or block errors; see
TMUX_BITBLKB3
imum value or rolls over depending on the value of
SMPR_SAT_ROLLOVER
nal count to a holding register when SMPR_PMRESET
(Table
B3 errors received in the G1[7:4] bits of port 2 in the
received STS-3/STM-1 (AU-4) frame. This counter can
either count actual errors or block errors; see
TMUX_BITBLKB3
imum value or rolls over depending on the value of
SMPR_SAT_ROLLOVER and transfers its internal count to
a holding register when SMPR_PMRESET transitions from
a logic 0 to 1.
B3 errors received in the G1[7:4] bits of port 3 in the
received STS-3/STM-1 (AU-4) frame. This counter can
either count actual errors or block errors; see
TMUX_BITBLKB3
imum value or rolls over depending on the value of
SMPR_SAT_ROLLOVER and transfers its internal count to
a holding register when SMPR_PMRESET transitions from
a logic 0 to 1.
Reserved.
Receive Line REI Count. Counts the number of
errors received in the M1 byte of the receive
STS-3/STM-1 (AU-4) frame. This counter can either
count actual errors or block errors; see
TMUX_BITBLKM1
its maximum value or rolls over depending on the
value of SMPR_SAT_ROLLOVER and transfers its
internal count to a holding register when
SMPR_PMRESET transitions from a logic 0 to 1.
65) transitions from a logic 0 to 1.
(Table
(Table
(Table
Function
(Table
95). This counter holds at its max-
95). This counter holds at its max-
95). This counter holds at its max-
(Table
Function
95). This counter holds at
67) and transfers its inter-
Agere Systems Inc.
May 2001
0x00000
Default
Default
0x0000
0x0000
0x0000
Reset
0x000
Reset