tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 273

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

Preliminary Data Sheet
May 2001
12 28-Channel Framer Registers
Table 378. FRM_TSLR32, Transmit Signaling Link Register 32 (R/W) (continued)
* See
Table 379. FRM_TSLR33, Transmit Signaling Link Register 33 (COR)
* See
12.10 Performance Monitor Per Link Registers
The following tables describe the functions of all bits in the register map. Counters are programmable to either roll-
over or saturate, and may be programmed to clear on read.
Registers are only provisionable to clear-on-read (COR).
For each address, the register bits are identified as either read/write (R/W) or read only (RO), and the value of the
bits on reset are given.
Table 380. Performance Monitor Per Link Register Addressing Map
* L and P represent hexidecimal digits used for absolute addressing in
Agere Systems Inc.
Address*
Address*
15 14
0x8LT20
0
0x8LT21
Table 376
Table 376
0
LNK4 LNK3 LNK2 LNK1 LNK0
L*
13
for values of L and T.
for values of L and T.
1:0
15:4
Bit
Bit
1:0
2
3
2
FRM_T_SIGSRC[1:0] Signaling Data Source. Indicates which of the entities will
12
FRM_T_TS16AIS Time Slot 16 AIS Detection Status. If time slot 16 multi-
FRM_T_FGSRC
FRM_T_TS16A
Name
Name
11
—
—
10
Address Pins (ADDR15—ADDR0)
Reserved. Must write to 0.
Time Slot 16 Multiframe Alignment Status. A 0 indicates
that currently, time slot 16 multiframe alignment is not estab-
lished. A1 indicates that currently, time slot 16 multiframe
alignment has been established.
frame alignment is lost, this bit will reflect the detection of AIS
in time slot 16.
Reserved. Must write to 0.
F and G Source. Indicates which entity will be the source for
the F and G values used in handling the ABCD bits.
0 = Host programmed.
1 = Sourced from the Rx system interface.
The F and G programming can be implied by the system
interface only when using the ASM CHI or the parallel sys-
tem interface.
be the source for the ABCD bits.
00 = Signaling programmed by the host.
01 = Signaling extracted from the Rx line.
10 = Signaling received from the system interface.
9
P*
(continued)
RXP = 0
TXP = 1
8
Table 382
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
through
7
1
Function
Function
6
0
Table
PM5 PM4 PM3 PM2 PM1 PM0
TMXF28155/51 Super Mapper
401.
5
4
—
3
2
1
Default
Reset
0x000
Default
Reset
00
0
0
00
0
0
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