tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 535

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

Preliminary Data Sheet
May 2001
21 28-Channel Framer Block Functional Description
21.26.18 Distributed Stuffing: E1
For E1, the parallel bus system interface time slot arrangement is as follows:
Five* stuff TSs | device 0, link 0—20 | four stuff TSs | device 1, link 0—20 | four stuff TSs | device 2,
link 0—20 |, etc.
Where * means in TS 0 three stuff time slots are inserted instead of five.
Hence: total time slots = (5 + 21 + 4 + 21 + 4 +21) * 32 TSs – 2 TSs skipped in TS 0 = 2430 TSs.
Table 605
Table 605. Parallel System Bus Interface Time-Slot Arrangement for E1
Table 606. PSB System I/O Definition
Agere Systems Inc.
TS_D[ ], RS_D[] [16:9] Time Slot Data [msb:lsb]
TS_GCLK, RS_GCLK System Global Clock [19.44 MHz]
TS31
TS0
TS1
TS2
TS3
TS4
TS_D[ ], RS_D[] [8]
TS_D[ ], RS_D[] [7]
TS_D[ ], RS_D[] [6]
TS_D[ ], RS_D[] [5]
TS_D[ ], RS_D[] [4]
TS_D[ ], RS_D[] [3]
TS_D[ ], RS_D[] [2]
TS_D[ ], RS_D[] [1]
TS_GFS, RS_GFS
RS_GTCLK
Name
DEV0
DEV1
DEV2
DEV0
DEV1
DEV2
DEV0
DEV1
DEV2
DEV0
DEV1
DEV2
DEV0
DEV1
DEV2
DEV0
DEV1
DEV2
shows the distribution of the time slots and stuffing in the STM-1 frame for the E1 mode.
— — R R R
—
—
—
—
—
—
—
—
—
—
—
—
R
R
R
R
R
R R R R
R R R R
R R R R
R R R R
R R R R
R R R R
R R R R
R R R R
R R R R
R R R R
R R R R
R R R R
R R R R
R R R R
R R R R
R R R R
R R R R
Signaling A-bit
Signaling B-bit
Signaling C-bit
Signaling D-bit
Signaling F-bit
Signaling G-bit
Data Parity
Signaling Parity
System Frame Sync
External Global Transmit Line Clock (CEPT-2.048 MHz, T1-1.544 MHz). Only required if
internal framer PLL is not used.
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
2
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
Repeat TS4 Format For TS5
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
4
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
5
Link number (R = stuffed time slot)
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
6
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
7
. . .
. . .
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
8
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
9
Definition
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
10
—
11
11
11
11
11
11
11
11
11
11
11
11
11
11
11
TS30
11
11
11
(continued)
12
12
12
12
12
12
12
12
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12
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12
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12
12
TMXF28155/51 Super Mapper
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