tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 66

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
7 Microprocessor Interface and Global Control and Status Registers
Table 65. SMPR_GTR, Global Trigger Register (RW)
Table 66. SMPR_MSRR, Block Software Reset Register (RW)
66
Address
0x0000D
Address
0x0000E
15:10
15:8
Bit
7:1
Bit
9
8
0
7
6
5
SMPR_FRM_SWRS
SMPR_BER_INSRT
SMPR_TPG_SWRS
SMPR_DJA_SWRS
SMPR_PMRESET
SMPR_SWRS
Name
Name
—
—
—
Reserved.
Bit Error Rate Insertion. When this bit is set to 1,
this bit indicates to the Super Mapper that a bit error
has to be inserted in the appropriate frame.
Performance Monitor Reset. When this bit is set to
1, the PMRESET signal will transition from a logic 0
to a logic 1 state. It will stay at a logic 1 state for a
minimum of 100 ns. (Self-clearing.)
Reserved.
Super Mapper Software Reset. When this bit is set
to 1, it will create a software reset of the device. This
reset has the same effect as the hardware reset. All
microprocessor registers are reset to their default
states and all internal data path state machine are
reset. (Self-clearing.)
Reserved.
TPG Block Software Reset. When this bit is set to 1, it will
create a software reset for the test-pattern generation macro.
This reset has the same effects as the hardware reset and
chip-level software reset. All microprocessor registers within
the macro are reset to their default states. All internal data
path state machine within the block are also reset.
DJA Block Software Reset. When this bit is set to 1, it will
create a software reset for the digital jitter attenuation block.
This reset has the same effects as the hardware reset and
chip-level software reset. All microprocessor registers within
the macro are reset to their default states. All internal data
path state machine within the block are also reset.
FRM Block Software Reset. When this bit is set to 1, it will
create a software reset for the framer block. This reset has the
same effects as the hardware reset and chip-level software
reset. All microprocessor registers within the block are reset
to their default states. All internal data path state machine
within the block are also reset.
Function
Function
Agere Systems Inc.
(continued)
Reset Default
May 2001
0x0000
Default
0x0000
Reset