tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 21

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

May 2001
3 Pin Information
Table 8. DS3 Port
Agere Systems Inc.
M22
V22
U22
R22
P22
N22
K22
Pin
J22
PHASEDETDOWN
DS3POSDATAOUT
DS3NEGDATAOUT
DS3DATAOUTCLK
DS3NEGDATAIN
DS3POSDATAIN
DS3DATAINCLK
PHASEDETUP
Symbol
(continued)
Type
—
—
—
—
—
—
—
—
down
down
down
down
Pull
Pull
Pull
Pull
I/O
O
O
O
O
I
I
I
I
Phase Detector Up. Phase error signal out to external filter
and VCXO. This output will generate an error signal when
the VCXO output is slower than the reference signal.
Phase Detector Down. Phase error signal out to external fil-
ter and VCXO. This output will generate an error signal when
the VCXO output is faster that the reference signal.
Positive Data Output. Serial DS3 positive data out to LIU
when the DS3 output port is operating in dual rail-mode.
Nonreturn to zero DS3 data output when the DS3 output is
operating in single ended mode.
Negative Data Output. Serial DS3 negative data output to
LIU when the DS3 port is operating in dual rail mode. In sin-
gle rail mode, this output is not used and may be left uncon-
nected.
DS3 Data Out Clock. 44.736 MHz DS3 clock input. If the
Super Mapper is being used to map DS3 data to and from
STS-1, then this clock will be supplied by the external VCXO
that is associated with the DS3 clock recovery PLL. In other
DS3 modes (e.g., M13) this input will be supplied by an
external crystal oscillator, usually associated with a DS3 LIU.
If the DS3 port is not used, this input may be tied to ground
or left open, since it is equipped with an internal pull-down
resistor.
Positive Data Input. If the DS3 port is configured in dual-rail
mode, then this input is serial positive data from an external
DS3 LIU. If the DS3 port is configured in single-rail mode,
then this input is serial nonreturn-to zero data from the exter-
nal LIU.
Negative Data In. In dual rail mode, this is negative data
from an external DS3 LIU. In single rail mode, it may be con-
nected to the bipolar violation output of the external DS3 LIU,
left unconnected, or tied to ground.
DS3 Data In Clock. This is a 44.736 MHz clock input from
the clock recovery in the external DS3 LIU.
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Description
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