tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 470

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
20 M13/M23 MUX/DeMUX Block Functional Description
The traditional algorithm for declaring out-of-frame (three errors in 16 F bits) results in false out-of-frame approxi-
mately every 30 seconds when the received bit error rate is 10
F bit errors before declaring out-of-frame (M13_DS3_MODE = 1), the M13 normally stays in frame for over an hour
when the bit error rate is 10
The M13_DS3_LOF
mately 3 ms). Once set, M13_DS3_LOF is not cleared until M13_DS3_OOF is continuously low for 28 frame peri-
ods.
The user can provision the M13 to automatically output AIS if either bit M13_DS3_OOF = 1 (by setting
M13_AUTO_AIS_OOF
The received DS3 frames are also checked for severely errored frames (SEF). An SEF defect is the occurrence of
three or more F-bit errors in 16 consecutive F bits and is reported through bit M13_RDS3_SEF
SEF defect is terminated when the signal is in-frame and there are less than three F-bit errors in 16 consecutive
F bits.
AIS, Idle, and RAI Detection. Each M frame, the 4704 information bits are checked for the presence of the AIS
(1010) or idle (1100) pattern. In order to detect these patterns in the presence of a high error rate, AIS
(M13_DS3_AISPAT_DET = 1
declared if fewer than five pattern errors are received in each of two consecutive frames. Once AIS or idle is
declared, these bits are not cleared until at least 16 pattern errors are received in each of 2 consecutive frames
(T1.231).
In addition to the fixed information bit patterns, AIS and idle signals are transmitted with all C bits set to 0 and both
X bits set to 1. These conditions are monitored by the M13 and reported in bits M13_DS3_CBZ_DET
and M13_DS3_RAI_DET
If every C bit in three consecutive DS3 frames is 0, the M13 sets M13_DS3_CBZ_DET to 1. If the three C bits in a
single M-subframe are all 1, M13_DS3_CBZ_DET is cleared. If both X bits in two consecutive frames are received
as 0, the device sets M13_DS3_RAI_DET to 1. Once M13_DS3_RAI_DET is set, it is not cleared until both X bits
in two consecutive frames are received as 1.
The user may wish to declare AIS or idle based on a combination of some or all of the following bits:
M13_DS3_CBZ_DET, M13_DS3_RAI_DET, and M13_DS3_AISPAT_DET or M13_DS3_IDLEPAT_DET.
C-Bit Processing. The M13 can be provisioned to operate in either the M23 mode (M13_M23_CBP = 1
(Table
interpreted as stuff indicator bits, and they are checked for loopback requests. If the third C bit differs from the first
and second C bits in the y
The M13_DS2_LB_DETy bit is cleared when the third C bit does not differ from the first two C bits in subframe y for
five successive DS3 frames.
The first C bit of each frame, C1, provides C-bit parity identification. If for eight consecutive frames it is received as
a 1, the M13 sets M13_DS3_C1_DET
frames with
C1 = 0 must be received before it is cleared.
The RCBDATA (pin E15) output provides access to the received C2, C4, C5, C6, and C16 through C21 C bits. The
received data link bits, C13 through C15, are output as a serial stream on RDLDATA pin (H22).
FEAC. In the C-bit parity mode, the third C bit of each DS3 frame, C3, is monitored for FEAC signals. Active FEAC
signals consist of repeating 16-bit code words of the form 0 x5x4x3x2x1x0 0 11111111, where xi can be a 1 or a 0,
and the bits are received right-to-left. The same code word must be received four consecutive times before it is
accepted.
When a code word is accepted, the action taken by the M13 depends on the value of x5x4x3x2x1x0, which may be
an alarm indication, a loopback activation, or a loopback deactivation.
470
260)) or the C-bit parity mode (M13_M23_CBP = 0). In the M23 mode, the C bits in each M-subframe are
(Table
(Table
(Table
th
–3
224) bit is set if bit M13_DS3_OOF is high continuously for 28 frame periods (approxi-
M-subframe for 5 successive DS3 frames, M13_DS2_LB_DETy
.
(Table
259) to 1), or M13_DS3_LOF = 1 (by setting M13_AUTO_AIS_LOF to 1).
224).
224)) or idle (M13_DS3_IDLEPAT_DET = 1
(Table
224) to 1. Once M13_DS3_C1_DET bit is set, three consecutive
–3
. By waiting for four consecutive M-subframes with
(continued)
(Table
224)) pattern detection is
(Table
Agere Systems Inc.
(Table
244) is set to 1.
(Table
225). An
May 2001
224)