tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 47

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tmxf28155

Manufacturer Part Number
tmxf28155
Description
Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
Manufacturer
ETC-unknow
Datasheet

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Part Number:
tmxf281553BAL3C
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Preliminary Data Sheet
May 2001
5 Timing Characteristics
Table 36. CHI Receive Timing Characteristics
* f
5.6 Parallel System Bus Timing
Table 37
transmit direction (to the system interface) the frame sync is sampled and the data is clocked out on the rising edge
of the clock. In the receive direction (from the switch) the data and frame sync are sampled on the rising edge of
the clock.
Table 37. PSB Interface Transmit Timing Characteristics
Agere Systems Inc.
CK
can be either 2.048 MHz, 4.096 MHz, 8.192 MHz, or 16.384 MHz.
Symbol
Symbol
t
t
t
t
SSYNC
HSYNC
HDATA
SDATA
f
t
f
t
t
CK
CK
t
t
PD
CK
CK
t
t
t
t
and
R
R
S
H
F
F
Table 38
LINERXSYNC[28:1]
LINERXSYNC29
FRAME SYNC
LINERXCLK29
Clock Frequency*
Clock Period
Clock Rise Time
Clock Fall Time
Frame Sync Setup Time
Frame Sync Hold Time
CHI Data Setup Time
CHI Data Hold Time
Clock Frequency
Clock Period
Clock Rise Time
Clock Fall Time
Frame Sync Setup Time
Frame Sync Hold Time
Clock to PSB Out Delay
DATA
CLOCK
with
Figure 12
Parameter
Parameter
(continued)
and
Figure 11. CHI Receive I/O Timing
Figure
13, respectively, show the transmit and receive timing. In the
t
CK
t
SDATA
t
SSYNC
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
2.048
488.2
Min
30
25
0
0
0
0
19.44
51.44
t
Min
HSYNC
0
0
8
0
3
t
HDATA
TMXF28155/51 Super Mapper
16.384
61.04
Max
3
3
19.44
51.44
Max
10
3
3
MHz
Unit
ns
ns
ns
ns
ns
ns
ns
MHz
Unit
ns
ns
ns
ns
ns
ns
5-9081(F)
47

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