tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 409

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

Preliminary Data Sheet
May 2001
18 SPE Mapper Functional Description
Agere Systems Inc.
The pointer interpreter transitions into the INC state based on the following conditions:
The pointer interpreter transitions out of the NDF state based on the following conditions:
The pointer interpreter transitions into the NORM state based on the following conditions:
The pointer interpreter transitions out of the NORM state based on the following conditions:
The pointer interpreter transitions into the NDF state based on the following conditions:
The pointer interpreter transitions out of the INC state based on the following conditions:
— If NDF is enabled on the incoming H1 and H2 bytes, the pointer interpreter transitions from the NORM, NDF,
— Continuous NDF. If NDF (1001, 0001, 1101, 1011, 1000) is received for the number of consecutive frames
— Following any three consecutive, consistent, and valid pointers, the pointer interpreter transitions from the NDF
— Following three consecutive frames with all ones in the H1 and H2 bytes, the pointer interpreter transitions from
— Following three new, consecutive, consistent, and valid pointers, the pointer interpreter transitions from the
— Following the number of consecutive invalid pointers (determined by the value programmed in
— Following three new consecutive, consistent, and valid pointers, the pointer interpreter transitions into the
— Following any three consecutive, consistent, and valid pointers, the pointer interpreter transitions into the
— Following the number of consecutive invalid pointers (determined by the value programmed in
— If NDF is enabled on the incoming H1 and H2 bytes, the pointer interpreter transitions from the NORM state
— Following three consecutive frames with all ones in the H1 and H2 bytes, the pointer interpreter transitions from
— When operating in the 8 of 10 mode (SPE_8ORMAJORITY = 1 (
— When operating in the 8 of 10 mode (SPE_8ORMAJORITY = 1), if 8 of the 10 I and D bits are correct for a
— When operating in the 8 of 10 mode (SPE_8ORMAJORITY = 1), if 8 of the 10 I and D bits are correct for a
— If NDF is enabled on the incoming H1 and H2 bytes, the pointer interpreter transitions from the INC state into
— Following three consecutive frames with all ones in the H1 and H2 bytes, the pointer interpreter transitions from
— Following three new consecutive, consistent, and valid pointers, the pointer interpreter transitions from the INC
— Following any three consecutive, consistent, and valid pointers, the pointer interpreter transitions from the INC
— Following the number of consecutive invalid pointers (determined by the value programmed in
AIS, INC, and DEC states into the NDF state.
(determined by the value programmed in SPE_CNTDLOPCNT[1:0]
sitions from the NDF state into the LOP-TU3 state.
state into the NORM state.
the NDF state into the AIS-TU3 state.
NDF state into the NORM state.
SPE_CNTDLOPCNT[1:0]), the pointer interpreter transitions from the NDF state into the LOP-TU3 state.
NORM state.
NORM state. i.e., transitioning from the INC, DEC, and NDF states.
SPE_CNTDLOPCNT[1:0]), the pointer interpreter transitions from the NORM state into the LOP-TU3 state.
into the NDF state.
the NORM state into the AIS-TU3 state.
correct for a pointer decrement on the incoming H1 and H2 bytes the pointer interpreter transitions from the
NORM state into the DEC state. Otherwise, if 3 of the 5 I bits and 3 of the 5 D bits are correct for a pointer
decrement on the incoming H1 and H2 bytes, the pointer interpreter transitions from the NORM state into the
DEC state.
pointer increment on the incoming H1 and H2 bytes, the pointer interpreter transitions from the NORM state
into the INC state. Otherwise, if 3 of the 5 I bits and 3 of the 5 D bits are correct for a pointer increment on the
incoming H1 and H2 bytes, the pointer interpreter transitions from the NORM state into the INC state.
pointer increment on the incoming H1 and H2 bytes the pointer interpreter transitions into the INC state. Oth-
erwise, if 3 of the 5 I bits and 3 of the 5 D bits are correct for a pointer increment on the incoming H1 and H2
bytes, the pointer interpreter transitions into the INC state.
the NDF state.
the INC state into the AIS-TU3 state.
state into the NORM state.
state into the NORM state.
SPE_CNTDLOPCNT[1:0]
state.
(Table
149)), the pointer interpreter transitions from the INC state into the LOP-TU3
(continued)
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Table
(Table
149)), if 8 of the 10 I and D bits are
TMXF28155/51 Super Mapper
149)), the pointer interpreter tran-
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