tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 305

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tmxf28155

Manufacturer Part Number
tmxf28155
Description
Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
Manufacturer
ETC-unknow
Datasheet

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Preliminary Data Sheet
May 2001
12 28-Channel Framer Registers
Table 435. FRM_HCR3, Transmit HDLC Channel Register 3 (R/W )
* See
Agere Systems Inc.
Bits 10:0, 3, 1:0 can only be written as the channel is being enabled, (i.e., bit 14 held 0 and is now being
written to 1).
Address*
0x8HP82
0x8HP82
Table 432
for mapping of H and P .
13:11
10:9
Bit
15
14
8
7
6
5
4
FRM_THC_RESET
FRM_CFLAGS[1:0]
FRM_HTTHRSEL
FRM_TENABL
FRM_PRMEN
FRM_TLOOP
FRM_IFCS
FRM_C_R
Name
(continued)
Transmit HDLC Reset. When this bit is 1, the channel is
held in reset.
This clears status for the channel, disables the channel,
and clears the FIFO for the channel.
Transmit HDLC Enable. When this bit is 0, and written to
1, the channel is reinitialized and enabled. When this bit is
1, and written to 0, no further data will be transmitted and
any partial data being serialized will be lost. The channel
is disabled.
The user should reset the FIFO to prevent partial packets
from being transmitted once re-enabled. Writing the same
value as currently programmed has no effect.
Reserved. Must write to 0.
Closing Flags. Only valid in HDLC mode. These bits
select one of four values (00 = FRM_FCNT0[4:0],
01 = FRM_FCNT1[4:0], 10 = FRM_FCNT2[4:0],
11 = FRM_FCNT3[4:0]
value indicates the number of additional closing flags
inserted after an HDLC packet (e.g., if FRM_FCNT2[4:0]
is selected and it is set to 00100, then five flags are
inserted).
PRM Enable. When 1, this channel is enabled to send
PRM packets automatically. When 0, this feature is dis-
abled. (Bit only for channels 1—28, or else reserved.)
When enabled, PRMs will not be sent until all four sec-
onds of PRM information are valid.
HDLC Controller Loopback. When this bit is set to 1, the
channel will operate in loopback mode. When 0, the chan-
nel operates normally.
Note: The corresponding Rx channel should be enabled
PRM C/R Bit. This bit is inserted as the C/R bit when
sending a PRM packet on this channel. (Bit only for chan-
nels 0—27, or else reserved.)
Transmit Threshold Select. This bit selects which of the
two programmable FIFO threshold values to use for this
channel (0 selects FRM_HTTHRSH0
selects FRM_HTTHRSH1
FCS Insert. Only valid in HDLC mode. When 0, this bit
indicates the FCS at the end of an HDLC packet should
be inserted. A 1 indicates that the internally computed
FCS will not be inserted at the end of the packet.
before enabling the Tx channel for loopback.
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
(Table 333—Table
Function
(Table
TMXF28155/51 Super Mapper
328)).
(Table
336)). This
327), 1
Default
Reset
000
00
0
0
0
0
0
0
0
305

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