tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 523
![no-image](/images/no-image-200.jpg)
tmxf28155
Manufacturer Part Number
tmxf28155
Description
Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
Manufacturer
ETC-unknow
Datasheet
1.TMXF28155.pdf
(606 pages)
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
tmxf281553BAL3C
Manufacturer:
DSP
Quantity:
5
- Current page: 523 of 606
- Download datasheet (5Mb)
Preliminary Data Sheet
May 2001
21 28-Channel Framer Block Functional Description
21.25.1 Framer Timing Selection
The following diagram shows the framer timing selection.
Legend for
Device pins:
Framer register bits:
Framer internal signals:
21.26 System Interface
21.26.1 System Interface Introduction
The system interface of Super Mapper can be programed for several modes of operation:
Concentration Highway (CHI) Mode. This is the system interface on Agere’s current framers. It can be pro-
grammed to operate at 2.048 MHz, 4.096 MHz, 8.192 MHz, or 16.384 MHz clock rates (data rates up to
8.192 Mbits/s only). In this mode, a pair of global system clock and system frame sync (one for the transmit and
one for the receive direction) are required. This interface can be used, for example, to interface with the TSI device.
Agere Systems Inc.
CLKIN_PLL (AD24)—system clock into PLL.
MODE2_PLL (AB21)—PLL input clock frequency select pins.
MODE1_PLL (AE24).
MODE0_PLL (AF24).
FRM_MODE[3:0]
FRM_PLL_BYPAS
FRM_SW_TRN
tp_rclk—transmit path receive clock.
tp_tclk—transmit path transmit clock.
rs_gtclk—receive system global transmit clock (LINERXDATA[29] device pin D13).
rp_rclk—receive path receive clock
tp_rclk[1—28]
MODE2_PLL
MODE1_PLL
MODE0_PLL
CLKIN_PLL
rs_gtclk
Figure
67:
(Table
28
1
3
(Table
(Table
BUFFER x28
PLL
301)—switching or transport mode select (global).
422)—framing mode select (per link).
Figure 67. Framer Block Transmit Path Timing Selection
301)—transmit path clock select from PLL or external system interface (global).
FRM_MODE[1—28][3:0]
DS1
E1
1
0
1
28
BUFFER x28
FRM_PLL_BYPAS
28
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
1
0
rp_rclk_[1:28]
FRM_SW_TRN[1—28]
0
1
(continued)
28
FRM_LOOP
TMXF28155/51 Super Mapper
TIMING
0
1
TRANSMIT PATH
FORMATTER
FRAME
0
1
FRM_TXLBMD[1:0]
FRM_AUTOPLB
FRM_AUTOLLB
tp_tclk[1—128]
5-9076(F)r.1
523
Related parts for tmxf28155
Image
Part Number
Description
Manufacturer
Datasheet
Request
R
![AA05B-005L-120D](/images/no-image3.png)
Part Number:
Description:
Manufacturer:
ETC-unknow
Datasheet:
![HM3-65787H-5](/images/no-image3.png)
Part Number:
Description:
Manufacturer:
ETC-unknow
Datasheet: