tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 131

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

8 TMUX Registers
Table 143. TMUX Register Map (continued)
Note: The reset default of all reserved bits is 0. Shading denotes reserved bits.
Agere Systems Inc.
Preliminary Data Sheet
May 2001
Addr. Symbol Bit 15 Bit 14 Bit 13
0x400A0
0x400A7
0x400A8
0x400AF
0x400B0
0x400B7
0x400E0
0x400FF
0x40100
0x4011F
0x40120
0x4013F
—
—
—
—
—
—
TMUX_RJ0EX
TMUX_TJ0VA
TMUX_RJ1EX
TMUX_RJ1EX
TMUX_RJ1EX
TMUX_RJ0C
PECTED_1
PECTED_2
PECTED_3
APTURED
LUE[1—8]
PECTED
[1—32]
[1—32]
[1—32]
[1—8]
[1—8]
(continued)
TMUX_EXPJ1DMON1[64][7:0]
TMUX_EXPJ1DMON2[64][7:0]
TMUX_EXPJ1DMON3[64][7:0]
TMUX_EXPJ0DMON[16][7:0]
TMUX_EXPJ1DMON1[2][7:0]
TMUX_EXPJ1DMON2[2][7:0]
TMUX_EXPJ1DMON3[2][7:0]
TMUX_EXPJ0DMON[2][7:0]
Bit 12
TMUX_J0DMON[16][7:0]
TMUX_TJ0DINS[16][7:0]
TMUX_J0DMON[2][7:0]
TMUX_TJ0DINS[2][7:0]
—
—
—
—
—
—
Bit 11
Bit 10
Expected J1 Receive Value for STS #1—R/W
Expected J1 Receive Value for STS #2—R/W
Expected J1 Receive Value for STS #3—R/W
Expected J0 Receive Value—R/W
Captured J0 Receive Value—RO
J0 Byte Transmit Insert—R/W
Bit 9
Bit 8
Bit 7
Bit 6
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Bit 5
TMUX_EXPJ1DMON1[63][7:0]
TMUX_EXPJ1DMON2[63][7:0]
TMUX_EXPJ1DMON3[63][7:0]
TMUX_EXPJ0DMON[15][7:0]
TMUX_EXPJ1DMON1[1][7:0]
TMUX_EXPJ1DMON2[1][7:0]
TMUX_EXPJ1DMON3[1][7:0]
TMUX_EXPJ0DMON[1][7:0]
TMUX_J0DMON[15][7:0]
TMUX_TJ0DINS[15][7:0]
TMUX_J0DMON[1][7:0]
TMUX_TJ0DINS[1][7:0]
Bit 4
—
—
—
—
—
—
TMXF28155 Super Mapper
Bit 3
Bit 2
Bit 1
Bit 0
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