tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 579
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tmxf28155
Manufacturer Part Number
tmxf28155
Description
Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
Manufacturer
ETC-unknow
Datasheet
1.TMXF28155.pdf
(606 pages)
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Preliminary Data Sheet
May 2001
24 Test-Pattern Generation/Detection Functional Description
24.5.11 TPG Idle Generator
The TPG has one output dedicated to providing a valid, SF framed DS1 idle data pattern. This datastream also has
an associated clock TPG_CLKx and frame-sync signal TPG_SYNCx (x odd). This pattern is specified in detail in
T1.403 for DS1.
24.5.12 TPG Error Insertion
A single bit error is injected into the test sequence each time that the global control signal SMPR_BER_INSRT
(Table 65, SMPR_GTR, Global Trigger Register (RW) on page66
enable bit TPG_BERINSx
Similarly, for framed signals, a single framing bit error may be injected into the test sequence each time that the
TPG_FERINSx
For certain types of framed signals (that is, DS1 ESF and E1 multiframe), cyclic-redundancy check (CRC) errors
may be injected into the test sequence. A single error insertion event is triggered each time that the
TPG_CRCEINSx
from 0 to 1.
24.5.13 TPG Interrupts
There are no interrupts from the TPG at the current time.
24.5.14 Test-Pattern Monitor (TPM)
The test-pattern monitor TPM sub-block contains four self-synchronizing detectors that are provisioned to search
for a particular test pattern (one each for signal at DS1, E1, DS2, and DS3). Each of the four monitor blocks
searches for the framed or unframed sequence at that rate, as determined by the values of TPM_FRAMEx
(Table 507
the corresponding TPG register bits).
24.5.15 TPM Channel Selection
In normal operation, the user connects one of the available DS1, E1, DS2, or DS3 signals to the corresponding
TPM input by configuring the cross connect (XC).
24.5.16 TPM Clock Edge and Data Polarity Selection
The edge of the clocks XC_TCLKx that is used to acquire the test data is provisionable to either the rising edge
TPM_EDGEx = 1
tern monitors. The polarity of the input data stream may also be provisioned to normal TPM_TPINVx = 0
(Table
24.6 TPM Framing Acquisition and Synchronization
24.6.1 DS1/E1
For framed data streams TPM_FRAMEx = 1
frame sequence in the selected signal. If no frame is found, TPM_OOFx
tion (status) signals default to 1, indicating an out-of-frame condition.
Agere Systems Inc.
507, 508, 509, and 510) or inverted TPM_TPINVx = 1.
and
Table
(Table
(Table
(Table
508) and TPM_SEQm[2:0]
502) bit transitions from 0 to 1.
500) (for DS1-ESF) or TPG_CRC4EINSx
507, 508, 509, and 510) or the falling edge TPM_EDGEx = 0 for each of the four test-pat-
(Table
501) is set to 1.
(Table 507
(Table
507, 508, 509, and 510) register bits (defined similarly to
and
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
Table
) transitions from 0 to 1 while the associated
(Table
508), the monitor searches for the appropriate
(Table
503) (for E1) register bit toggles
TMXF28155/51 Super Mapper
496) is set. The TPM_OOFx condi-
(continued)
579
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