tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 112

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tmxf28155

Manufacturer Part Number
tmxf28155
Description
Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
Manufacturer
ETC-unknow
Datasheet

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Part Number:
tmxf281553BAL3C
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155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
8 TMUX Registers
Table 115. TMUX_TBERINS_CTL, Transmit High-Speed Error Insertion Control Parameters (R/W)
112
Address
0x40048
15:13
10:8
Bit
7:5
3:1
12
11
4
0
TMUX_THSB3ERRINS[3:1] Transmit High-speed B3 Error Insert. Control bit,
TMUX_THSB2ERRINS[3:1] Transmit High-speed B2 Error Insert. Control bit,
TMUX_THSB1ERRINS
TMUX_TPREIINS[3:1]
TMUX_TPSLREIINS
TMUX_TPSB2EIINS
(continued)
TMUX_TLREIINS
Name
Reserved.
Transmit Protection Signal Line REI Insert. Con-
trol bit, when set to a logic 1, causes one line REI
error in the outgoing protection STS-3/STM-1 (AU-4)
signal when there is a rising edge observed on the
SMPR_BER_INSRT
Transmit Protection Signal B2 Error Insert. Con-
trol bit, when set to a logic 1, causes one B2 error in
the outgoing protection STS-3/STM-1 (AU-4) signal
when there is a rising edge observed on the
SMPR_BER_INSRT
Transmit Path REI Error Insert. Control bit, when
set to a logic 1, causes one path REI error in the out-
going STS-3/STM-1 (AU-4) signal when there is a
rising edge observed on the SMPR_BER_INSRT
(Table
AU-4 mode.
when set to a logic 1, causes the output B3 byte in
the outgoing STS-3/STM-1 (AU-4) signal to be
inverted when there is a rising edge observed on the
SMPR_BER_INSRT
port 1 control is valid in AU-4 mode.
Transmit High-speed Line REI Insert. Control bit,
when set to a logic 1, causes one line REI error in
the outgoing STS-3/STM-1 (AU-4) signal when there
is a rising edge observed on the
SMPR_BER_INSRT (Table 65) input signal.
when set to a logic 1, causes the output B2 bytes in
the outgoing STS-3/STM-1 (AU-4) signal to be
inverted when there is a rising edge observed on the
SMPR_BER_INSRT (Table 65) input signal.
Transmit High-speed B1 Error Insert. Control bit,
when set to a logic 1, causes the output B1 byte in
the outgoing STS-3/STM-1 (AU-4) signal to be
inverted when there is a rising edge observed on the
SMPR_BER_INSRT (Table 65) input signal.
65) input signal. Only port 1 control is valid in
(Table
(Table
(Table
Function
65) input signal.
65) input signal.
65) input signal. Only
Agere Systems Inc.
May 2001
Default
Reset
000
0x0
0
0
0
0
0
0

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