tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 208
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tmxf28155
Manufacturer Part Number
tmxf28155
Description
Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
Manufacturer
ETC-unknow
Datasheet
1.TMXF28155.pdf
(606 pages)
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155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
11 M13/M23 MUX/DeMUX Registers
Table 232. M13_DS2_LB_DETD_R, DS2 Loopback Detect Delta (RO)
Table 233. M13_DS2_RSV_RCVD_R, DS2 Receive Reserved Bit Delta (RO)
Table 234. M13_DS2DMX_LOCD_R, DS2 DeMUX Loss of Clock Delta (RO)
Table 235. M13_DS1_LOCD_R[1—4], DS1 Loss of Clock Delta Registers (RO)
208
Address
Address
Address
0x10017 15:7
0x10018 15:7
0x10019 15:7
0x1001F—
Address
0x1001E
0x1001E
0x1001F
0x10021
0x10020
0x10021
6:0
6:0
6:0
Bit
Bit
Bit
15:4
15:8
Bit
3:0
7:0
7:0
7:0
M13_DS2_RSV_
M13_DS2DMX_
M13_DS2_LB_
M13_DS1_LOCD[28:25]
M13_DS1_LOCD[24:17]
M13_DS1_LOCD[16:9]
RCVD[7:1]
LOCD[7:1]
DETD[7:1]
M13_DS1_LOCD[8:1]
Name
Name
Name
—
—
—
Name
—
—
Reserved.
These individual delta bits are set as the result of the corre-
sponding state bits M13_DS2_LB_DET[7:1]
tioning either from 0 to 1 or from 1 to 0. Delta bits can be
programmed to be either clear on read (COR) or clear on write
(COW), and they are not set to 1 again until the event reoc-
curs.
Reserved.
These individual delta bits are set as the result of the corre-
sponding state bits M13_DS2_RSV_RCV[7:1]
transitioning either from 0 to 1 or from 1 to 0. Delta bits can be
programmed to be either clear on read (COR) or clear on write
(COW), and they are not set to 1 again until the event reoc-
curs. (G.747).
Reserved.
These individual delta bits are set as the result of the corre-
sponding state bits M13_DS2DMX_LOC[7:1]
sitioning either from 0 to 1 or from 1 to 0. Delta bits can be
programmed to be either clear on read (COR) or clear on write
(COW), and they are not set to 1 again until the event reoc-
curs.
(continued)
Reserved.
Reserved.
These individual delta bits are set as the result of the
corresponding state bits M13_DS1_LOC[28:1]
(Table
0. Delta bits can be programmed to be either clear on
read (COR) or clear on write (COW), and they are not
set to 1 again until the event reoccurs.
247) transitioning either from 0 to 1 or from 1 to
Function
Function
Function
Function
(Table
(Table
(Table
244) transi-
246) tran-
Agere Systems Inc.
245)
May 2001
Default
Default
Default
Default
Reset
0x000
Reset
0x000
Reset
0x000
Reset
0x000
0x00
0x00
0x00
0x00
0x00
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