tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 525

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

Preliminary Data Sheet
May 2001
21 28-Channel Framer Block Functional Description
Setting FRM_DNOTFAS to 1 enables the NOTFAS time slot to be transmitted twice on the transmit system inter-
face in the NOTFAS and FAS time slot (TS0) positions. Similarly, the receive system interface assumes time slot 0
to carry NOTFAS data that is repeated twice.
21.26.5 Transparent Mode
This mode is only used in the CHI mode. In the transparent DS1 mode, the transmit system interface inserts the
193rd bit of the DS1 frame in bit 7 (LSB) of the first stuffed time slot. The receive system interface takes bit 7 of the
first stuffed time slot and inserts it into the framing bit position (193rd bit on the TDM data bus).
In the transparent E1 mode, the transmit system maps 32 received time slots into the CHI time slots. Similarly, the
receive system maps the CHI time slots into the TDM bus time slots. The transmit frame formatter inserts TS0 of
the CHI (FAS/NOTFAS) into the TS0 of the frame based on the biframe alignment.
21.26.6 Loopbacks
Two forms of loopbacks are supported: single time slot system loopback (STSSLB) and single time slot line loop-
back (STSLLB), as shown in
receive system interface selected using the configuration parameter FRM_TSLBA[4:0]
to the system. The idle code, programmable using the configuration registers (FRM_IDLE[7:0]
transmitted to the line in place of the looped back time slot.
When FRM_STSLLB = 1
figuration parameter FRM_TSLBA[4:0], is looped back to the line. The programmable idle code is transmitted to the
system in place of the looped back time slot.
21.26.7 System AIS
The transmit system interface transmits AIS automatically to the system on the following conditions:
On-demand AIS can also be sent to the system by setting the configuration register bit for the particular link
(FRM_MANAIS
Agere Systems Inc.
Loss of frame alignment in the frame aligner or the mapper block (provisionable using a configuration register
bit).
CEPT CRC-4 multiframe alignment timer expiration (provisionable using a configuration register bit).
(Table
LINE
LINE
419)).
(Table
Figure 68
350), a single time slot from the transmit system interface selected using the con-
SINGLE TIME-SLOT SYSTEM LOOPBACK
SINGLE TIME-SLOT LINE LOOPBACK
below. When FRM_STSSLB = 1
Figure 68. System Loopbacks
ES
ES
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
(Table
(continued)
ES = ELASTIC STORE
SYSTEM
SYSTEM
TMXF28155/51 Super Mapper
350), a single time slot from the
(Table
350), is looped back
(Table
349)), is
5-9030(F)r.1
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