tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 492

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
21 28-Channel Framer Block Functional Description
If the VT mapper is transporting byte sync mapped DS1 links into SONET frames, then the signaling source should
be set to VT mapper interface. In that case, the receive signaling processor will start collecting valid signaling
codes from the VT mapper and store them into the D, C, B, and A locations of FRM_RSLR0—FRM_RSLR31,
Receive Signaling Link Registers 0—31 (R/W),
If the VT mapper is the source of signaling, data will be extracted based on the standards listed below.
If the VT mapper is transporting byte sync mapped CEPT links into SONET frames, then the signaling source
should be set to the receive line interface. In that case, the receive signaling processor will extract the entire time
slot 16 multiframe and store that information into FRM_RSLR0—FRM_RSLR31, receive signaling link registers
0—31 (R/W) for each of the links.
If the signaling source is set to be the host, the host may write to FRM_RSLR0—FRM_RSLR31, receive signaling
link registers 0—31 (R/W) and those values will be forwarded to the selected destination. The host mode can also
be used to manually freeze signaling. When the source is switched from receive line to host, for example, the exist-
ing signaling codes will be held until modified by the host or until the signaling source is switched back to the
receive line interface. If the host mode is used to manually freeze signaling, then the signaling debounce feature
must be enabled. To enable signaling debounce set FRM_R_SIGDEB in
naling Link Register 33 (R/W) on page
Each of the links is completely independent from one another with respect to the signaling source selection. Any
combination of receive line, VT mapper, and host is acceptable.
21.9.4 Signaling Destination Selection
There are three destinations for the signaling extracted from the receive line or VT mapper interface:
1. Transmit system interface.
2. Transmit line interface.
3. FRM_RSLR0—FRM_RSLR31, receive signaling link registers 0—31 (R/W),
The signaling extracted from the receive line or VT mapper interface will automatically be delivered to the transmit
system interface when the framer section of the Super Mapper is programmed for switch mode. This is done by set-
ting FRM_SW_TRN in FRM_SFGR1, Superframer Global Register 1 (R/W),
The system interface will need to be configured for ASM mode in order for the signaling to be transmitted on the
PSB or CHI buses. ASM mode is controlled by FRM_SYSGR1, System Interface Global Register 1 (R/W),
Table 347 on page257
The signaling extracted from the VT mapper interface can be inserted into the transmit line interface when the
framer section of the Super Mapper is programmed for transport mode. This is done by setting FRM_SW_TRN in
FRM_SFGR1, Superframer Global Register 1 (R/W),
FRM_R_SIGI in
signaling will be inserted based on the programming of state modes of each time slot.
The receive signaling processor cannot provide data to the transmit system and the transmit line interface on differ-
ent links simultaneously.
Signaling extracted from the VT mapper or receive line interface will always be available in FRM_RSLR0—
FRM_RSLR31, Receive Signaling Link Registers 0—31 (R/W),
read these registers regardless of whether or not the signaling is forwarded to the transmit system or transmit line
interface. Receive Signaling Link Registers 0—31 DS1/CEPT/CMI Data,
of the data in those 32 registers for each of the receive line formats.
492
ITU Rec G.704 10/98 CEPT multiframe signaling structure
T1.403 1995 robbed-bit signaling
TTC JJ-20.11 CMI coded interface
ANSI T1.105SONET payload mapping
Bellcore GF-253-CORE SONET transport systems
ITU Rec G.707 10/98 network node interface for SDH
Table 374, FRM_RSLR33, Receive Signaling Link Register 33 (R/W) on page
bit 11.
269, bits 5 to 1.
Table 372 on page 268
Table 301 on page243
Table 372 on page268
for each of the links.
Table 577 on page 491
Table 374, FRM_RSLR33, Receive Sig-
(continued)
Table 301 on pag
, bits 15 to 0, and by setting
Table 372 on page268
for each link. The host can
e243, bits 15 to 1.
269, bit 8 to 1. The
Agere Systems Inc.
shows the position
.
May 2001