tmxf28155 ETC-unknow, tmxf28155 Datasheet - Page 385

• Manufacturer Part Number: tmxf28155
• Description: Tmxf28155 Super Mapper 155/51 Mbits/s Sonet/sdh X28/x21 Ds1/e1
• Manufacturer: ETC-unknow

Preliminary Data Sheet
TMXF28155/51 Super Mapper
May 2001
155/51 Mbits/s SONET/SDH x28/x21 DS1/E1
17 TMUX Functional Description
(continued)
The following boolean expression is the criteria for AUTO_AIS and send path AIS. The expressions represent com-
binations of signal status states register bits and inhibit state register bits that form the criteria.
Criteria for AUTO_AISO<n> =
((TMUX_RLAISMON AND TMUX_RLAISMON_AISINH AND TMUX_RPSMUXSEL) OR
(TMUX_RILOC AND TMUX_RILOC_AISINH AND TMUX_RPSMUXSEL) OR
(TMUX_RHSLOS AND TMUX_RHSLOS_AISINH AND TMUX_RPSMUXSEL) OR
(TMUX_RHSLOF AND TMUX_RHSLOF_AISINH) OR
(TMUX_RHSOOF AND TMUX_RHSOOF_AISINH) OR
(TMUX_RLOP<n> AND TMUX_RLOP_AISINH) OR
(TMUX_RHSSF AND TMUX_RHSSF_AISINH AND TMUX_RPSMUXSEL) OR
(TMUX_RHSSD AND TMUX_RHSSD_AISINH AND TMUX_RPSMUXSEL) OR
(TMUX_RSFB3<n> AND TMUX_RSFB3_AISINH) OR
(TMUX_RSDB3<n> AND TMUX_RSDB3_AISINH) OR
(TMUX_RPLMP<n> AND TMUX_RHPLMP_AISINH) OR
(TMUX_RUNEQP<n> AND TMUX_RUNEQP_AISINH) OR
(TMUX_RTIMP<n> AND TMUX_RTIMP_AISINH) OR
(TMUX_RPAIS_INS))
In addition to generating the external AUTO_AIS signal, the TMUX can insert path AIS into the received signal prior
to driving it onto the low-speed telecom bus. The conditions for sending path AIS include some of the above condi-
tions. The same inhibit bits are used as above. Note that the above AUTO_AISO[1—3] signal generation is on a per
STS-1 basis, while sending path AIS occurs on the complete STS-3/STM-1 signal (or STS-1 for STS-1 only mode).
Criteria for Send Path AIS =
((TMUX_RLAISMON AND TMUX_RLAISMON_AISINH AND TMUX_RPSMUXSEL) OR
(TMUX_RHSLOS AND TMUX_RHSLOS_AISINH AND TMUX_RPSMUXSEL) OR
(TMUX_RHSLOF AND TMUX_RHSLOF_AISINH) OR
(TMUX_RHSOOF AND TMUX_RHSOOF_AISINH) OR
(TMUX_RLOP<n> AND TMUX_RLOP_AISINH) OR
(TMUX_RHSSF AND TMUX_RHSSF_AISINH AND TMUX_RPSMUXSEL) OR
(TMUX_RHSSD AND TMUX_RHSSD_AISINH AND TMUX_RPSMUXSEL) OR
(TMUX_RPAIS_INS))
Receive Side Telecom Bus Interface. The TMUX outputs one parallel clock (RLSCLK, pin V4), three sync signals
(RLSSPE, RLSJ0J1V1, and RLSV1; pin numbers V1, V3, and W4), an 8-bit data bus (RLSDATA[7:0], pins R1, R3,
T4, T2, T3, U4, U2, and U3), and an odd/even (RLSPAR, pin V2) parity signal. The data bus carries either three
STS-1/TUG-3 signals, each in their own time slot, or it carries one STS-1 signal where the parallel clock operates
at 6.48 MHz instead of 19.44 MHz.
RLSCLK
RLSSPE
RLSJ0J1V1
RLSV1
A1
A2
J0
J1
V1
RLSDATA[7:0]
A1-1 A1-2 A1-3 A2-1
A2-2
A2-3 J0-1 J0-2 J0-3 J1-1 J1-2 J1-3 V1-1 V1-2 V1-3
3 BYTES
3 BYTES
3 BYTES
3 BYTES
3 BYTES
5-9008(F)
Figure 27. Receive Low-Speed Bus Interface Signals for STS-3/STM-1 Signals
Agere Systems Inc.
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