HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 723

MCU 5V 512K,PB-FREE 100-TQFP

HD64F3029XBL25V

Manufacturer Part Number
HD64F3029XBL25V
Description
MCU 5V 512K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3029XBL25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
19.3
The duty adjustment circuit adjusts the duty cycle of the clock signal from the oscillator to
generate .
19.4
The prescalers divide the system clock ( ) to generate internal clocks ( /2 to /4096).
19.5
The frequency divider divides the duty-adjusted clock signal to generate the system clock ( ). The
frequency division ratio can be changed dynamically by modifying the value in DIVCR, as
described below. Power consumption in the chip is reduced in almost direct proportion to the
frequency division ratio. The system clock generated by the frequency divider can be output at the
Rev. 2.0, 06/04, page 694 of 980
pin.
V
56*;
EXTAL
external)
4-5
CC
(internal or
Duty Adjustment Circuit
Prescalers
Frequency Divider
V
IH
Figure 19.7 External Clock Output Settling Delay Timing
t
DEXT

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