HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 393

MCU 5V 512K,PB-FREE 100-TQFP

HD64F3029XBL25V

Manufacturer Part Number
HD64F3029XBL25V
Description
MCU 5V 512K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3029XBL25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
9.5.3
Each 16-bit timer channel can generate a compare match/input capture A interrupt, a compare
match/input capture B interrupt, and an overflow interrupt. In total there are nine interrupt sources
of three kinds, all independently vectored. An interrupt is requested when the interrupt request
flag are set to 1.
The priority order of the channels can be modified in interrupt priority registers A (IPRA). For
details see section 5, Interrupt Controller.
Table 9.6 lists the interrupt sources.
Table 9.6
Rev. 2.0, 06/04, page 364 of 980
Channel
0
1
2
Note: * The priority immediately after a reset is indicated. Inter-channel priorities can be changed
by settings in IPRA.
Interrupt Sources
16-bit timer Interrupt Sources
Interrupt
Source
IMIA0
IMIB0
OVI0
IMIA1
IMIB1
OVI1
IMIA2
IMIB2
OVI2
Description
Compare match/input capture A0
Compare match/input capture B0
Overflow 0
Compare match/input capture A1
Compare match/input capture B1
Overflow 1
Compare match/input capture A2
Compare match/input capture B2
Overflow 2
Priority*
High
Low

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