HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 340

• Manufacturer Part Number: HD64F3029XBL25V
• Description: MCU 5V 512K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3029XBL25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Pin
PB
TMIO
DREQ
PB
TMO
PB
TMIO
DREQ
PB
TMO
3
2
1
0
/TP
/TP
/TP
/TP
2
0
3
1
/
/
1
0
11
10
9
8
/
/
/
/
Pin Functions and Selection Method
Bits OIS3/2 and OS1/0 in 8TCSR3, bits CCLR1 and CCLR0 in 8TCR3, bit NDER11 in NDERB, and bit
PB
OIS3/2 and OS1/0
PB
NDER11
Pin function
Notes:
Bits OIS3/2 and OS1/0 in 8TCSR2, bit NDER10 in NDERB, and bit PB
OIS3/2 and OS1/0
PB
NDER10
Pin function
Bits OIS3/2 and OS1/0 in 8TCSR1, bits CCLR1 and CCLR0 in 8TCR0, bit NDER9 in NDERB, and bit PB
select the pin function as follows.
OIS3/2 and OS1/0
PB
NDER9
Pin function
Notes:
Bits OIS3/2 and OS1/0 in 8TCSR0, bit NDER8 in NDERB, and bit PB
OIS3/2 and OS1/0
PB
NDER8
Pin function
3
3
2
1
0
DDR select the pin function as follows.
DDR
DDR
DDR
DDR
*1 TMIO
*2 When an external request is specified as a DMAC activation source, DREQ
*1 TMIO
*2 When an external request is specified as a DMAC activation source, DREQ
bits OIS3/2 and OS1/0, bit NDER11, and bit PB
bits OIS3/2 and OS1/0, bit NDER9, and bit PB
3
1
input when CCLR1 = CCLR0 = 1.
input when CCLR1 = CCLR0 = 1.
PB
PB
input
input
PB
PB
3
2
—
—
—
—
0
0
0
0
input
input
1
0
PB
PB
output
output
All 0
3
All 0
2
All 0
All 0
PB
PB
output
output
1
0
1
0
1
0
1
0
1
0
DREQ
DREQ
TMIO
TMIO
1
DDR.
3
DDR.
3
1
1
0
input*
input*
input*
input*
0
DDR select the pin function as follows.
2
DDR select the pin function as follows.
Rev. 2.0, 06/04, page 311 of 980
TP
TP
1
1
2
2
output
output
11
10
TP
TP
1
1
output
1
1
output
1
1
1
1
9
8
1
0
input regardless of
input regardless of
TMIO
TMO
Not all 0
Not all 0
Not all 0
Not all 0
TMIO
output
output
TMO
2
—
—
—
—
—
—
—
—
3
output
output
0
1
1
DDR