HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 335

MCU 5V 512K,PB-FREE 100-TQFP

HD64F3029XBL25V

Manufacturer Part Number
HD64F3029XBL25V
Description
MCU 5V 512K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3029XBL25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Port B Data Register (PBDR): PBDR is an 8-bit readable/writable register that stores output data
for pins port B. When port B functions as an output port, the value of this register is output. When
a bit in PBDDR is set to 1, if port B is read the value of the corresponding PBDR bit is returned.
When a bit in PBDDR is cleared to 0, if port B is read the corresponding pin logic level is read.
PBDR is initialized to H'00 by a reset and in hardware standby mode. In software standby mode it
retains its previous setting.
Rev. 2.0, 06/04, page 306 of 980
Bit
Initial value
Read/Write
PB
R/W
0
7
7
PB
R/W
0
6
6
PB
R/W
0
5
5
Port B data 7 to 0
These bits store data for port B pins
PB
R/W
0
4
4
PB
R/W
0
3
3
R/W
PB
0
2
2
PB
R/W
0
1
1
PB
R/W
0
0
0

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