HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 174

• Manufacturer Part Number: HD64F3029XBL25V
• Description: MCU 5V 512K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3029XBL25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

In byte access, whether the upper or lower data bus is used is determined by whether the address
is even or odd. The upper data bus is used for an even address, and the lower data bus for an odd
address.
6.4.3
Table 6.4 shows the data buses used, and the valid strobes, for the access spaces.
In a read, the RD signal is valid for both the upper and the lower half of the data bus.
In a write, the HWR signal is valid for the upper half of the data bus, and the LWR signal for the
lower half.
Byte size
Byte size
Word size
Longword size
Figure 6.8 Access Sizes and Data Alignment Control (16-Bit Access Area)
Valid Strobes
· Even address
· Odd address
1st bus cycle
2nd bus cycle
D
15
Upper data bus
Rev. 2.0, 06/04, page 145 of 980
D
8
D
7
Lower data bus
D
0