HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 193

MCU 5V 512K,PB-FREE 100-TQFP

HD64F3029XBL25V

Manufacturer Part Number
HD64F3029XBL25V
Description
MCU 5V 512K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3029XBL25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
When an access is made to DRAM space designated as an 8-bit-access area in ABWCR, only
UCAS is output. When the entire DRAM space is designated as 8-bit-access space and CSEL = 0,
PB5 can be used as an input/output port.
Note that RAS down mode cannot be used when a device other than DRAM is connected to
external space and HWR and LWR are used as write strobes. In this case, also, an idle cycle (Ti)
is always inserted when an external access to other than DRAM space occurs after a DRAM space
access. For details, see section 6.9, Idle Cycle.
Table 6.8
CSEL
0
1
Figure 6.21 shows the control timing.
Rev. 2.0, 06/04, page 164 of 980
Byte control
Note: n = 2 to 5
Figure 6.21 Control Timing (Upper-Byte Write Access When CSEL = 0)
CSEL Settings and UCAS
UCAS
UCAS
UCAS
UCAS
PB
HWR
4
PB
PB
A
4
5
(
23
(
(
(
to A
0
)
)
)
)
UCAS
UCAS and LCAS
UCAS
T
p
LCAS
LCAS Output Pins
LCAS
LCAS
LCAS
LCAS
LCAS
PB
LWR
5
Row
Tr
Column
T
c1
T
c2

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