HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 493

• Manufacturer Part Number: HD64F3029XBL25V
• Description: MCU 5V 512K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3029XBL25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Bit 4—Parity Mode (O/E E E E ): Selects even or odd parity. The O/E bit setting is only valid when the
PE bit is set to 1, enabling parity bit addition and checking, in asynchronous mode. The O/E bit
setting is ignored in synchronous mode, or when parity addition and checking is disabled in
asynchronous mode.
Bit 4
O/E E E E
0
1
Notes: *1 When even parity is selected, the parity bit added to transmit data makes an even
Bit 3—Stop Bit Length (STOP): Selects one or two stop bits in asynchronous mode. This
setting is used only in asynchronous mode. In synchronous mode no stop bit is added, so the
STOP bit setting is ignored.
Bit 3
STOP
0
1
Notes: *1 One stop bit (with value 1) is added to the end of each transmitted character.
In receiving, only the first stop bit is checked, regardless of the STOP bit setting. If the second
stop bit is 1, it is treated as a stop bit. If the second stop bit is 0, it is treated as the start bit of the
next incoming character.
Bit 2—Multiprocessor Mode (MP): Selects a multiprocessor format. When a multiprocessor
format is selected, parity settings made by the PE and O/E bits are ignored. The MP bit setting is
valid only in asynchronous mode. It is ignored in synchronous mode.
For further information on the multiprocessor communication function, see section 13.3.3,
Multiprocessor Communication.
Bit 2
MP
0
1
Rev. 2.0, 06/04, page 464 of 980
*2 When odd parity is selected, the parity bit added to transmit data makes an odd
*2 Two stop bits (with value 1) are added to the end of each transmitted character.
number of 1s in the transmitted character and parity bit combined. Receive data must
have an even number of 1s in the received character and parity bit combined.
number of 1s in the transmitted character and parity bit combined. Receive data must
have an odd number of 1s in the received character and parity bit combined.
Description
Even parity*
Odd parity*
Description
1 stop bit*
2 stop bits*
Description
Multiprocessor function disabled
Multiprocessor format selected
1
2
2
1
(Initial value)
(Initial value)
(Initial value)