HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 379

MCU 5V 512K,PB-FREE 100-TQFP

HD64F3029XBL25V

Manufacturer Part Number
HD64F3029XBL25V
Description
MCU 5V 512K,PB-FREE 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet

Specifications of HD64F3029XBL25V

Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
DMA, PWM, WDT
Number Of I /o
70
Program Memory Size
512KB (512K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Input Capture Function: The 16TCNT value can be transferred to a general register when an
input edge is detected at an input capture input/output compare pin (TIOCA or TIOCB). Rising-
edge, falling-edge, or both-edge detection can be selected. The input capture function can be used
to measure pulse width or period.
Rev. 2.0, 06/04, page 350 of 980
16TCNT input
clock
16TCNT
GR
Compare
match signal
TIOCA,
TIOCB
Output compare output timing
The compare match signal is generated in the last state in which 16TCNT and the general
register match (when 16TCNT changes from the matching value to the next value). When the
compare match signal is generated, the output value selected in TIOR is output at the output
compare pin (TIOCA or TIOCB). When 16TCNT matches a general register, the compare
match signal is not generated until the next counter clock pulse.
Figure 9.20 shows the output compare timing.
Figure 9.20 Output Compare Output Timing
N
N
N + 1

Related parts for HD64F3029XBL25V