HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 633

• Manufacturer Part Number: HD64F3029XBL25V
• Description: MCU 5V 512K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3029XBL25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

(b) Flash multipurpose data destination parameter (FMPDR: general register ER0 of CPU):
This parameter indicates the start address in the area which stores the data to be programmed in
the user MAT. When the storage destination of the program data is in flash memory, an error
occurs. The error occurrence is indicated by the WD bit (bit 2) in FPFR.
FMPDR
Bits 31 to 0—MOD31 to MOD0: Store the start address of the area which stores the program
data for the user MAT. The consecutive 128-byte data is programmed to the user MAT starting
from the specified start address.
(c) Flash pass/fail parameter (FPFR: general register R0L of CPU)
An explanation of FPFR as the return value indicating the programming result is provided here.
Bit 7—Unused: Returns 0.
Bit 6—Programming Mode Related Setting Error Detect (MD): Returns the check result of
whether the signal input to the FWE pin is high and whether the error protection state is entered.
When a low-level signal is input to the FWE pin or the error protection state is entered, 1 is
written to this bit. The input level to the FWE pin and the error protection state can be confirmed
with the FWE bit (bit 7) and the FLER bit (bit 4) in FCCS, respectively. For conditions to enter
the error protection state, see section 18.6.3, Error Protection.
Bit 6
MD
0
1
Rev. 2.0, 06/04, page 604 of 980
Bit :
Bit :
Bit :
Bit :
Bit :
MOD31 MOD30 MOD29 MOD28 MOD27 MOD26 MOD25 MOD24
MOD23 MOD22 MOD21 MOD20 MOD19 MOD18 MOD17 MOD16
MOD15 MOD14 MOD13 MOD12 MOD11 MOD10
MOD7
Description
FWE and FLER settings are normal (FWE = 1, FLER = 0)
FWE = 0 or FLER = 1, and programming cannot be performed
31
23
15
7
7
0
MOD6
MD
30
22
14
6
6
MOD5
29
21
13
EE
5
5
MOD4
28
20
12
FK
4
4
MOD3
27
19
11
3
3
0
MOD2
WD
26
18
10
2
2
MOD9
MOD1
WA
25
17
1
9
1
MOD8
MOD0
SF
24
16
0
8
0