HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 17

• Manufacturer Part Number: HD64F3029XBL25V
• Description: MCU 5V 512K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3029XBL25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

2.9
Section 3 MCU Operating Modes .....................................................................59
3.1
3.2
3.3
3.4
3.5
3.6
Section 4 Exception Handling ...........................................................................73
4.1
4.2
4.3
4.4
4.5
4.6
Section 5 Interrupt Controller............................................................................85
5.1
Rev. 2.0, 06/04, page xii of xxiv
Basic Operational Timing ................................................................................................. 55
2.9.1
2.9.2
2.9.3
2.9.4
Overview........................................................................................................................... 59
3.1.1
3.1.2
Mode Control Register (MDCR) ...................................................................................... 61
System Control Register (SYSCR) ................................................................................... 62
Operating Mode Descriptions ........................................................................................... 64
3.4.1
3.4.2
3.4.3
3.4.4
3.4.5
3.4.6
Pin Functions in Each Operating Mode ............................................................................ 66
Memory Map in Each Operating Mode ............................................................................ 67
3.6.1
Overview........................................................................................................................... 73
4.1.1
4.1.2
4.1.3
Reset.................................................................................................................................. 76
4.2.1
4.2.2
4.2.3
Interrupts........................................................................................................................... 79
Trap Instruction................................................................................................................. 80
Stack Status after Exception Handling.............................................................................. 81
Notes on Stack Usage ....................................................................................................... 82
Overview........................................................................................................................... 85
5.1.1
5.1.2
5.1.3
5.1.4
Overview.............................................................................................................. 55
On-Chip Memory Access Timing........................................................................ 55
On-Chip Supporting Module Access Timing ...................................................... 56
Access to External Address Space ....................................................................... 57
Operating Mode Selection ................................................................................... 59
Register Configuration......................................................................................... 60
Mode 1 ................................................................................................................. 64
Mode 2 ................................................................................................................. 64
Mode 3 ................................................................................................................. 64
Mode 4 ................................................................................................................. 65
Mode 5 ................................................................................................................. 65
Mode 7 ................................................................................................................. 65
Note on Reserved Areas....................................................................................... 67
Exception Handling Types and Priority............................................................... 73
Exception Handling Operation ............................................................................ 73
Exception Vector Table ....................................................................................... 74
Overview.............................................................................................................. 76
Reset Sequence .................................................................................................... 76
Interrupts after Reset............................................................................................ 78
Features................................................................................................................ 85
Block Diagram ..................................................................................................... 86
Pin Configuration................................................................................................. 87
Register Configuration......................................................................................... 87