HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 72

• Manufacturer Part Number: HD64F3029XBL25V
• Description: MCU 5V 512K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3029XBL25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Execution of BCLR Instruction
BCLR
After Execution of BCLR Instruction
Input/output
DDR
Explanation: To execute the BCLR instruction, the CPU begins by reading P4DDR. Since
P4DDR is a write-only register, it is read as H'FF, even though its true value is H'3F.
Next the CPU clears bit 0 of the read data, changing the value to H'FE.
Finally, the CPU writes this value (H'FE) back to P4DDR to complete the BCLR instruction.
As a result, P4
are set to 1, making P4
The BCLR instruction can be used to clear flags in the on-chip registers to 0. In an interrupt-
handling routine, for example, if it is known that the flag is set to 1, it is not necessary to read the
flag ahead of time.
#0, @P4DDR
0
DDR is cleared to 0, making P4
P4
Output
1
7
7
and P4
P4
Output
1
6
;Clear bit 0 in data direction register
6
output pins.
P4
Output
1
5
P4
Output
1
0
an input pin. In addition, P4
4
P4
Output
1
3
Rev. 2.0, 06/04, page 43 of 980
P4
Output
1
2
7
P4
Output
1
DDR and P4
1
P4
Input
0
0
6
DDR