HD64F3029XBL25V Renesas Electronics America, HD64F3029XBL25V Datasheet - Page 485

• Manufacturer Part Number: HD64F3029XBL25V
• Description: MCU 5V 512K,PB-FREE 100-TQFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Hr

Specifications of HD64F3029XBL25V

• Core Processor: H8/300H
• Core Size: 16-Bit
• Speed: 25MHz
• Connectivity: SCI, SmartCard
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 70
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 16K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Features of the smart card interface are listed below.
Rev. 2.0, 06/04, page 456 of 980
Full-duplex communication
The transmitting and receiving sections are independent, so the SCI can transmit and receive
simultaneously. The transmitting and receiving sections are both double-buffered, so serial
data can be transmitted and received continuously.
The following settings can be made for the serial data to be transferred:
Built-in baud rate generator with selectable bit rates
Selectable transmit/receive clock sources: internal clock from baud rate generator, or external
clock from the SCK pin
Four types of interrupts
Transmit-data-empty, transmit-end, receive-data-full, and receive-error interrupts are
requested independently. The transmit-data-empty and receive-data-full interrupts from SCI0
can activate the DMA controller (DMAC) to transfer data.
Asynchronous communication
Built-in baud rate generator with selectable bit rates
Three types of interrupts
Transmit-data-empty, receive-data-full, and transmit/receive-error interrupts are requested
independently. The transmit-data-empty and receive-data-full interrupts can activate the DMA
controller (DMAC) to transfer data.
LSB-first or MSB-first transfer
Inversion of data logic level
Data length: 8 bits
Parity bits generated and checked
Error signal output in receive mode (parity error)
Error signal detect and automatic data retransmit in transmit mode
Supports both direct convention and inverse convention