EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 926

• Manufacturer Part Number: EP4SE530H40I3
• Description: IC STRATIX IV FPGA 530K 1517HBGA
• Manufacturer: Altera
• Series: STRATIX® IV Er

Specifications of EP4SE530H40I3

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 976
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1517-HBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

5–80
Table 5–16. Dynamic Reconfiguration Controller Port List (ALTGX_RECONFIG Instance) (Part 5 of 13)
Stratix IV Device Handbook Volume 2: Transceivers
logical_channel_address [8:0]
rx_tx_duplex_sel[1:0]
Port Name
Output
Input/
Input
Input
Enabled by the ALTGX_RECONFIG MegaWizard Plug-In Manager
when you enable the Use 'logical_channel_address' port for
Analog controls reconfiguration option in the Analog controls
screen.
The width of the logical_channel_address port depends on the
value you set in the What is the number of channels controlled by
the reconfig controller? option in the Reconfiguration settings
screen. This port can be enabled only when the number of channels
controlled by the dynamic reconfiguration controller is more than
one.
For more information, refer to
Regular Transceiver Channels” on page 5–6
Addressing of PMA-Only Channels” on page
This is a 2 bit wide signal. You can select this in the Error
checks/Data rate switch screen.
The advantage of using this optional port is that it allows you to
reconfigure only the transmitter portion of a channel, even if the
channel configuration is duplex.
For a setting of:
■
■
■
rx_tx_duplex_sel[1:0] = 2'b00—the transmitter and
receiver portion of the channel is reconfigured.
rx_tx_duplex_sel[1:0] = 2'b01—the receiver portion of the
channel is reconfigured.
rx_tx_duplex_sel[1:0] = 2'b10—the transmitter portion of
the channel is reconfigured.
Chapter 5: Dynamic Reconfiguration in Stratix IV Devices
Description
Dynamic Reconfiguration Controller Port List
“Logical Channel Addressing of
February 2011 Altera Corporation
and
5–7.
“Logical Channel
(Note
3),
(4)