EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 895

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EP4SE530H40I3

Manufacturer Part Number
EP4SE530H40I3
Description
IC STRATIX IV FPGA 530K 1517HBGA
Manufacturer
Altera
Series
STRATIX® IV Er

Specifications of EP4SE530H40I3

Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
976
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1517-HBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-

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Chapter 5: Dynamic Reconfiguration in Stratix IV Devices
Dynamic Reconfiguration Modes Implementation
Figure 5–23. Channel Reconfiguration with Transmitter PLL Select in a Transceiver Block
Note to
(1) Depending on the mode you select, PCS may or may not be present.
February 2011 Altera Corporation
Figure
refclk0
refclk1
5–23:
Figure 5–23
channel reconfiguration with transmitter PLL select mode.
clock
mux
clock
mux
shows the multiplexers that you can dynamically reconfigure using
CMU Channels
CMU0 PLL
CMU1 PLL
Logical
TX PLL
select
clock
clock
mux
mux
Stratix IV Device Handbook Volume 2: Transceivers
Full Duplex Transceiver Channel
DIVIDER
LOCAL
RX CHANNEL
TX CHANNEL
RX CDR
TX PMA + TX PCS
RX PMA + RX PCS
(1)
5–49

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