EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 802

• Manufacturer Part Number: EP4SE530H40I3
• Description: IC STRATIX IV FPGA 530K 1517HBGA
• Manufacturer: Altera
• Series: STRATIX® IV Er

Specifications of EP4SE530H40I3

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 976
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1517-HBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

3–48
Stratix IV Device Handbook Volume 2: Transceivers
Example 14
f
1
This section describes the requirements to combine transceiver channels when you
enable the AEQ feature.
You are not required to enable AEQ in all instances to combine them within the same
transceiver block. When you instantiate the reconfiguration controller
(ALTGX_Reconfig), the aeq_fromgxb and aeq_togxb ports available depend on the
setting in the what is the number of channels controlled by the reconfig controller
option. In configurations where AEQ is enabled on some of the transceiver channels
that are connected to the same reconfiguration controller, the reconfiguration
controller instance has additional aeq_fromgxb ports. To compile the design
successfully, connect the unused aeq_fromgxb ports to 0.
configuration.
Consider that you have two ALTGX instances, Instance 1 and Instance 2 with one
channel each. Assume that only Instance 1 has the Enable adaptive equalization
option enabled.
Because there are two instances, the starting channel numbers of Instance 1 and
Instance 2 are spaced four apart (0 and 4, respectively).
In the ALTGX_Reconfig Instance, set the what is the number of channels controlled
by the reconfig controller option to 8. The ALTGX_Reconfig Instance has 48 bits for
the aeq_fromgxb port (24 bits per 4 channels). Instance 1 has the aeq_fromgxb[23:0]
port because AEQ is enabled. Instance 2 does not have this port. Because Instance 1
has the starting channel number of 0, connect aeq_fromgxb of instance 1 to
aeq_fromgxb[23:0] of the ALTGX_Reconfig Instance and tie aeq_fromgxb[47:24] to
0.
For more information about setting this parameter, refer to the
Reconfiguration in Stratix IV Devices
Figure 3–24
Figure 3–24. Required Connection for the aeq_fromgxb Port
The top 24 bits of aeq_fromgxb are tied to 0. This is because the logical channel address
of Instance 1 starts at 4. Therefore, the top 24 bits of aeq_fromgxb corresponds to
Instance 2.
Reconfiguration Controller
shows the required connection for the aeq_fromgxb port.
reconfig_fromgxb[33:0]
aeq_fromgxb[47:0]
Combining Transceiver Channels When You Enable the Adaptive Equalization (AEQ) Feature
Chapter 3: Configuring Multiple Protocols and Data Rates in Stratix IV Devices
24’h0
chapter.
reconfig_fromgxb[16:0]
reconfig_fromgxb[33:17]
aeq_fromgxb[23:0]
Example 14
February 2011 Altera Corporation
Dynamic
shows the
Instance 1
Instance 2