EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 711

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EP4SE530H40I3

Manufacturer Part Number
EP4SE530H40I3
Description
IC STRATIX IV FPGA 530K 1517HBGA
Manufacturer
Altera
Series
STRATIX® IV Er

Specifications of EP4SE530H40I3

Number Of Logic Elements/cells
531200
Number Of Labs/clbs
21248
Total Ram Bits
27376
Number Of I /o
976
Voltage - Supply
0.87 V ~ 0.93 V
Mounting Type
Surface Mount
Operating Temperature
-40°C ~ 100°C
Package / Case
1517-HBGA
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Number Of Gates
-

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Chapter 2: Transceiver Clocking in Stratix IV Devices
Transceiver Channel Datapath Clocking
February 2011 Altera Corporation
Receiver Channel Datapath Clocking
f
1
Timing may not be met for higher data rates when transceiver channels are
configured in Basic (PMA Direct) functional mode. To meet FPGA fabric-Transmitter
PMA interface timing above certain data rates, you may need to phase shift the
interface clock tx_clkout used to clock the transmitter user logic. To meet FPGA
fabric-Receiver hold time violations, you may have to modify the way data is
captured in the FPGA fabric.
For more information, refer to
Functional
This section describes the receiver PMA and PCS datapath clocking in supported
configurations. Receiver datapath clocking varies between non-bonded and bonded
channel configurations. It also varies with the use of PCS blocks, such as deskew FIFO
and rate matcher. This section describes the following:
Non-Bonded Channel Configurations
In non-bonded channel configurations, receiver PCS blocks of each channel are
clocked independently. Each non-bonded channel also has separate rx_analogreset
and rx_digitalreset signals that allow independent reset of the receiver PCS logic in
each channel.
For more information about transceiver reset and power down signals, refer to the
Reset Control and Power Down in Stratix IV Devices
In non-bonded channel configurations, receiver channel datapath clocking has two
scenarios:
Non-Bonded Receiver Clocking Without Rate Matcher
The following functional modes have non-bonded receiver channel configuration
without rate matcher:
“Non-Bonded Channel Configurations”
“Bonded Channel Configurations” on page 2–43
“Basic (PMA Direct) Mode Channel Configurations” on page 2–49
“Non-Bonded Receiver Clocking Without Rate Matcher”
“Non-Bonded Receiver Clocking with Rate Matcher” on page 2–41
SONET/SDH
SDI
(OIF) CEI PHY Interface
Basic without rate matcher
Meeting Timing in Basic (PMA Direct) Mode
Mode.
AN 580: Achieving Timing Closure in Basic (PMA Direct)
Stratix IV Device Handbook Volume 2: Transceivers
chapter.
2–39

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