EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 18

• Manufacturer Part Number: EP4SE530H40I3
• Description: IC STRATIX IV FPGA 530K 1517HBGA
• Manufacturer: Altera
• Series: STRATIX® IV Er

Specifications of EP4SE530H40I3

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 976
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1517-HBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

1–4
Stratix IV Device Handbook Volume 1
Stratix IV E Device
Stratix IV E devices provide an excellent solution for applications that do not require
high-speed CDR-based transceivers, but are logic, user I/O, or memory intensive.
Figure 1–2
Figure 1–2. Stratix IV E Chip View
Note to
(1) Resource counts vary with device selection, package selection, or both.
Figure
shows a high-level Stratix IV E chip view.
1–2:
and Soft-CDR
and Soft-CDR
High-Speed
High-Speed
Purpose
LVDS I/O
with DPA
Purpose
LVDS I/O
with DPA
General
I/O and
General
I/O and
High-Speed LVDS I/O with DPA
PLL
PLL
PLL
PLL
General Purpose I/O and
and Soft-CDR
General Purpose
General Purpose
I/O and Memory
I/O and Memory
Interface
Interface
(Note 1)
(Logic Elements, DSP,
Embedded Memory,
Clock Networks)
FPGA Fabric
PLL
PLL
PLL
PLL
General Purpose I/O and
150 Mbps-1.6 Gbps
LVDS interface with DPA and Soft-CDR
Chapter 1: Overview for the Stratix IV Device Family
General Purpose
General Purpose
I/O and Memory
I/O and Memory
Interface
Interface
February 2011 Altera Corporation
and Soft-CDR
and Soft-CDR
High-Speed
High-Speed
LVDS I/O
LVDS I/O
Purpose
with DPA
Purpose
with DPA
General
I/O and
General
I/O and
PLL
PLL
PLL
PLL
Feature Summary