EP4SE530H40I3 Altera, EP4SE530H40I3 Datasheet - Page 109

• Manufacturer Part Number: EP4SE530H40I3
• Description: IC STRATIX IV FPGA 530K 1517HBGA
• Manufacturer: Altera
• Series: STRATIX® IV Er

Specifications of EP4SE530H40I3

• Number Of Logic Elements/cells: 531200
• Number Of Labs/clbs: 21248
• Total Ram Bits: 27376
• Number Of I /o: 976
• Voltage - Supply: 0.87 V ~ 0.93 V
• Mounting Type: Surface Mount
• Operating Temperature: -40°C ~ 100°C
• Package / Case: 1517-HBGA
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Number Of Gates: -

Chapter 4: DSP Blocks in Stratix IV Devices
Stratix IV Operational Mode Descriptions
Figure 4–19. Multiply Accumulate Mode Shown for a Half DSP Block
Note to
(1) Block output for saturation overflow of chainout.
February 2011 Altera Corporation
accum_sload
dataa_0[ ]
datab_0[ ]
dataa_1[ ]
datab_1[ ]
dataa_2[ ]
datab_2[ ]
dataa_3[ ]
datab_3[ ]
Figure
Multiply Accumulate Mode
4–19:
Half-DSP Block
clock[3..0]
In multiply accumulate mode, the second-stage adder is configured as a 44-bit
accumulator or subtractor. The output of the DSP block is looped back to the
second-stage adder and added or subtracted with the two outputs of the first-stage
adder block according to
configured to operate in multiply accumulate mode.
A single DSP block can implement up to two independent 44-bit accumulators.
ena[3..0]
aclr[3..0]
+
+
output_saturate
output_round
Equation 4–3 on page
signa
signb
+
4–5.
Figure 4–19
chainout_sat_overflow (1)
Stratix IV Device Handbook Volume 1
shows the DSP block
44
result[ ]
4–29