HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 87

IC H8 MCU FLASH 256K 100TQFP

HD64F7047F50V

Manufacturer Part Number
HD64F7047F50V
Description
IC H8 MCU FLASH 256K 100TQFP
Manufacturer
Renesas Electronics America
Series
SuperH® SH7047r
Datasheets

Specifications of HD64F7047F50V

Core Processor
SH-2
Core Size
32-Bit
Speed
50MHz
Connectivity
CAN, SCI
Peripherals
POR, PWM, WDT
Number Of I /o
53
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
12K x 8
Voltage - Supply (vcc/vdd)
4.5 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Package
100PQFP
Family Name
SuperH
Maximum Speed
50 MHz
Operating Supply Voltage
5 V
Data Bus Width
32 Bit
Number Of Programmable I/os
53
Interface Type
CAN/SCI
On-chip Adc
16-chx10-bit
Number Of Timers
7
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-

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3.1
This LSI has four operating modes and four clock modes. The operating mode is determined by
the setting of MD3–MD0, and FWP pins. Do not change these pins during LSI operation (while
power is on). Do not set these pins in the other way than the combination shown in Table 3.1.
Table 3.1
Notes: The symbol x means “Don’t care.”
There are two modes as the MCU operating modes: MCU extension mode and single chip mode.
There are two modes to program the flash memory (on-board programming mode): boot mode and
user programming mode.
Mode
No.
Mode 0
Mode 1*
Mode 2
Mode 3
*
*
*
*
2
2
2
2
1. The mode3 and an 8-bit space of MCU extension mode is supported.
2. Programming mode for flash memory. Supported in only F-ZTAT version.
3. Cannot be used for this LSI.
3
Selection of Operating Modes
FWP MD3
1
1
1
1
0
0
0
0
Selection of Operating Modes
x
x
x
x
x
x
x
x
Section 3 MCU Operating Modes
Pin Setting
MD2
x
x
x
x
x
x
x
x
MD1 MD0 Mode Name
0
0
1
1
0
0
1
1
0
1
0
1
1
1
0
0
MCU extension
mode 0
MCU extension
mode 1
MCU extension
mode 2
Single chip mode
Boot mode*
User programming
mode*
2
2
Rev. 2.00, 09/04, page 45 of 720
On-Chip
ROM
Not Active
Not Active
Active
Active
Active
Active
Bus Width of
CS0 Area*
8-bit
Set by BCR1 of
BSC
Set by BCR1 of
BSC
Set by BCR1 of
BSC
1

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