HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 521

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

15.7
A bus transceiver IC is necessary to connect this LSI to a CAN bus. A Renesas HA13721
transceiver IC and its compatible products are recommended. Figure 15.16 shows a sample
connection diagram.
15.8
15.8.1
• The timer should not be operated during event trigger transmission (TCR15 = 0), or event
15.8.2
The HCAN2 is reset by a power-on reset, in hardware standby mode, and in software standby
mode. All the registers are initialized in a reset, but mailboxes MBx are not. After power-on,
however, mailboxes MBx are initialized, and their values are undefined. Therefore, mailbox
initialization must always be carried out after a power-on reset, a transition to hardware standby
mode, or software standby mode. The reset interrupt flag (IRR0) is always set after a power-on
reset or recovery from software standby mode. As this bit cannot be masked in the interrupt mask
register (IMR), if HCAN2 interrupt enabling is set in the interrupt controller without clearing the
flag, an HCAN2 interrupt will be initiated immediately. IRR0 should therefore be cleared during
initialization.
trigger may not be executed normally.
CAN Bus Interface
Usage Notes
Time Trigger Transmit Setting/Timer Operation Disabled
Reset
This LSI
HRxD1
HTxD1
Figure 15.16 High-Speed Interface Using HA13721
Note: NC: No Connection
NC
MODE
Rxd
Txd
NC
HA13721
CANH
CANL
GND
Vcc
Vcc
Rev. 2.00, 09/04, page 479 of 720
120 Ω
120 Ω
CAN bus