HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 119

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

6.3.2
ICR2 is a 16-bit register that sets the edge detection mode of the external interrupt input pins IRQ0
to IRQ3. ICR2 is, however, valid only when IRQ interrupt request detection mode is set to the
edge detection mode by the sense select bits of IRQ0 to IRQ 3 in Interrupt control register 1
(ICR1). If the IRQ interrupt request detection mode has been set to low level detection mode, the
setting of ICR2 is ignored.
Bit
5
4
3 to 0
Bit
15
14
Bit Name
IRQ2S
IRQ3S

Bit Name
IRQ0ES1
IRQ0ES0
Interrupt Control Register 2 (ICR2)
Initial
Value
0
0
All 0
Initial
Value
0
0
R/W
R/W
R/W
R
R/W
R/W
R/W
Description
IRQ2 Sense Select
This bit sets the IRQ2 interrupt request detection
mode.
0: Interrupt request is detected on low level of IRQ2
1: Interrupt request is detected on edge of IRQ2 input
IRQ3 Sense Select
This bit sets the IRQ3 interrupt request detection
mode.
0: Interrupt request is detected on low level of IRQ3
1: Interrupt request is detected on edge of IRQ3 input
Reserved
These bits are always read as 0. The write value
should always be 0.
Description
This bit sets the IRQ0 interrupt request edge
detection mode.
00: Interrupt request is detected on falling edge of
01: Interrupt request is detected on rising edge of
10: Interrupt request is detected on both of falling and
11: Cannot be set
input
(edge direction is selected by ICR2)
input
(edge direction is selected by ICR2)
IRQ0 input
IRQ0 input
rising edge of IRQ0 input
Rev. 2.00, 09/04, page 77 of 720