HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 335

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Operation when Error Occurs during Phase Counting Mode Operation, and Operation is
Restarted in Normal Mode: Figure 10.101 shows an explanatory diagram of the case where an
error occurs in phase counting mode and operation is restarted in normal mode after re-setting.
1. After a reset, MTU output is low and ports are in the high-impedance state.
2. Set phase counting mode.
3.
4. Set MTU output with the PFC.
5. The count operation is started by TSTR.
6. Output goes low on compare-match occurrence.
7. An error occurs.
8. Set port output with the PFC and output the inverse of the active level.
9. The count operation is stopped by TSTR.
10. Set in normal mode.
11. Initialize the pins with TIOR.
12. Set MTU output with the PFC.
13. Operation is restarted by TSTR.
MTU module
n=0 to 15
Port output
Figure 10.101 Error Occurrence in Phase Counting Mode, Recovery in Normal Mode
TIOC*A
TIOC*B
compare-match occurrence.)
output
Initialize the pins with TIOR. (The example shows initial high output, with low output on
PEn
PEn
RESET
1
TMDR
(PCM)
2
High-Z
High-Z
0 out)
TIOR
(1 init
3
(MTU)
PFC
4
TSTR
(1)
5
Match
6
occurs
Error
7
(PORT)
PFC
8
TSTR
(0)
9
(normal)
TMDR
10
Rev. 2.00, 09/04, page 293 of 720
0 out)
TIOR
(1 init
11
(MTU)
PFC
12
TSTR
(1)
13