HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 381

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Note:
Bit
2
1
0
*
Bit Name
TEND
MPB
MPBT
Only 0 can be written, for flag clearing.
Initial
Value
1
0
0
R/W
R
R
R/W
Description
Transmit End
[Setting conditions]
•
•
•
[Clearing conditions]
•
•
Multiprocessor Bit
MPB stores the multiprocessor bit in the receive data.
When the RE bit in SCR is cleared to 0 its previous
state is retained.
Multiprocessor Bit Transfer
MPBT sets the multiprocessor bit value to be added to
the transmit data.
Power-on reset, hardware standby mode, or
software standby mode
When the TE bit in SCR is 0
When TDRE = 1 at transmission of the last bit of a
1-byte serial transmit character
When 0 is written to TDRE after reading TDRE = 1
When the DTC is activated by a TXI interrupt and
writes data to TDR
Rev. 2.00, 09/04, page 339 of 720