HD64F7047F50V Renesas Electronics America, HD64F7047F50V Datasheet - Page 511

• Manufacturer Part Number: HD64F7047F50V
• Description: IC H8 MCU FLASH 256K 100TQFP
• Manufacturer: Renesas Electronics America
• Series: SuperH® SH7047r

Specifications of HD64F7047F50V

• Core Processor: SH-2
• Core Size: 32-Bit
• Speed: 50MHz
• Connectivity: CAN, SCI
• Peripherals: POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 12K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 16x10b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 100-TQFP, 100-VQFP
• Package: 100PQFP
• Family Name: SuperH
• Maximum Speed: 50 MHz
• Operating Supply Voltage: 5 V
• Data Bus Width: 32 Bit
• Number Of Programmable I/os: 53
• Interface Type: CAN/SCI
• On-chip Adc: 16-chx10-bit
• Number Of Timers: 7
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

15.4.4
Follow the procedure below to perform message reception after initial setting. Figure 15.10 shows
a flowchart in reception.
Message Reception
Initialization
Receive data setting
Local acceptance filter settings
Mailbox (RAM) initialization
Interrupt to CPU (RM1)
Message control read
Arbitration field setting
Message reception?
Message data read
(Match of identifier
HCAN2 port setting
Same RXPR = 1?
Interrupt settings
End of reception
Data frame?
in mailbox?)
Clear IRR1
MBC setting
BCR setting
IMR1 = 1?
Clear IRR0
IRR1 = 1
RXPR
Yes
Yes
No
No
Figure 15.10 Flowchart in Reception
Yes
No
Transmission of data frame corresponding
Yes
No
(Remote frame)
Interrupt to CPU (RM1)
Message control read
Clear IRR2 and IRR1
Message data read
IRR2 = 1, IRR1 = 1
RXPR, RFPR = 1
Unread message
to remote frame
: Settings by user
: Processing by hardware
IMR2 = 1?
Rev. 2.00, 09/04, page 469 of 720
No
Yes